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/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mutex.yaml115 reg = <0 0x14020000 0 0x1000>;
/openbmc/linux/arch/mips/include/asm/mach-au1x00/
H A Dau1000.h105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300
108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */
109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */
110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */
111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */
112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */
113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */
114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */
115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */
116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast27x0.c27 [ASPEED_DEV_SPI_BOOT] = 0x400000000,
28 [ASPEED_DEV_SRAM] = 0x10000000,
29 [ASPEED_DEV_SDMC] = 0x12C00000,
30 [ASPEED_DEV_SCU] = 0x12C02000,
31 [ASPEED_DEV_SCUIO] = 0x14C02000,
32 [ASPEED_DEV_UART0] = 0X14C33000,
33 [ASPEED_DEV_UART1] = 0X14C33100,
34 [ASPEED_DEV_UART2] = 0X14C33200,
35 [ASPEED_DEV_UART3] = 0X14C33300,
36 [ASPEED_DEV_UART4] = 0X12C1A000,
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi53 cluster0_opp: opp-table-0 {
129 #size-cells = <0>;
151 cpu0: cpu@0 {
154 reg = <0x000>;
169 reg = <0x001>;
184 reg = <0x100>;
199 reg = <0x101>;
214 CPU_SLEEP_0: cpu-sleep-0 {
220 arm,psci-suspend-param = <0x0010000>;
242 cpu_suspend = <0x84000001>;
[all …]
H A Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]