Home
last modified time | relevance | path

Searched +full:0 +full:x140 (Results 1 – 25 of 727) sorted by relevance

12345678910>>...30

/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-venice-gw73xx.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
49 pinctrl-0 = <&pinctrl_reg_usb1_en>;
60 pinctrl-0 = <&pinctrl_reg_usb2_en>;
71 pinctrl-0 = <&pinctrl_reg_wl>;
83 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
86 gpio = <&gpio2 19 0>; /* SD2_RESET */
97 pinctrl-0 = <&pinctrl_spi2>;
[all …]
H A Dimx8mp-venice-gw71xx.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
50 pinctrl-0 = <&pinctrl_spi2>;
70 pinctrl-0 = <&pinctrl_i2c2>;
75 reg = <0x19>;
77 pinctrl-0 = <&pinctrl_accel>;
95 pinctrl-0 = <&pinctrl_pcie0>;
103 pinctrl-0 = <&pinctrl_uart1>;
[all …]
H A Dimx8mp-venice-gw72xx.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
49 pinctrl-0 = <&pinctrl_reg_usb1_en>;
60 pinctrl-0 = <&pinctrl_reg_usb2_en>;
71 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
74 gpio = <&gpio2 19 0>; /* SD2_RESET */
85 pinctrl-0 = <&pinctrl_spi2>;
105 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
H A Dimx8mp-venice-gw74xx.dts35 reg = <0x0 0x40000000 0 0x80000000>;
41 key-0 {
51 interrupts = <0>;
86 pinctrl-0 = <&pinctrl_gpio_leds>;
88 led-0 {
106 #clock-cells = <0>;
113 pinctrl-0 = <&pinctrl_pps>;
119 pinctrl-0 = <&pinctrl_reg_usb2>;
131 pinctrl-0 = <&pinctrl_reg_can1>;
141 pinctrl-0 = <&pinctrl_reg_can2>;
[all …]
H A Dimx8mm-nitrogen-r2.dts30 pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
57 pinctrl-0 = <&pinctrl_sound_wm8960>;
83 pinctrl-0 = <&pinctrl_ecspi2>;
90 pinctrl-0 = <&pinctrl_fec1>;
98 #size-cells = <0>;
110 pinctrl-0 = <&pinctrl_flexspi>;
117 pinctrl-0 = <&pinctrl_i2c1>;
122 reg = <0x8>;
214 pinctrl-0 = <&pinctrl_i2c3>;
219 reg = <0x70>;
[all …]
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso19 compatible = "gw,imx8mm-gw73xx-0x";
25 gpios = <0 GPIO_ACTIVE_HIGH>;
33 pinctrl-0 = <&pinctrl_uart2>;
46 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
47 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
48 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
49 MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x140
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso19 compatible = "gw,imx8mm-gw72xx-0x";
25 gpios = <0 GPIO_ACTIVE_HIGH>;
33 pinctrl-0 = <&pinctrl_uart2>;
46 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
47 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
48 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
49 MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x140
H A Dimx8mm-venice-gw7902.dts32 reg = <0x0 0x40000000 0 0x80000000>;
37 #clock-cells = <0>;
55 interrupts = <0>;
90 pinctrl-0 = <&pinctrl_gpio_leds>;
92 led-0 {
135 #clock-cells = <0>;
142 pinctrl-0 = <&pinctrl_pps>;
158 pinctrl-0 = <&pinctrl_reg_usb1>;
169 pinctrl-0 = <&pinctrl_reg_wl>;
217 pinctrl-0 = <&pinctrl_spi1>;
[all …]
H A Dimx8mm-venice-gw7901.dts35 reg = <0x0 0x40000000 0 0x80000000>;
51 interrupts = <0>;
86 led-0 {
90 gpios = <&leds_gpio 0 GPIO_ACTIVE_HIGH>;
185 #clock-cells = <0>;
198 pinctrl-0 = <&pinctrl_reg_ioexp>;
211 pinctrl-0 = <&pinctrl_reg_isouart>;
223 pinctrl-0 = <&pinctrl_reg_usb2>;
234 pinctrl-0 = <&pinctrl_reg_wl>;
287 pinctrl-0 = <&pinctrl_spi1>;
[all …]
H A Dimx8mm-emcon.dtsi19 pinctrl-0 = <&pinctrl_gpio_led>;
38 pwms = <&pwm1 0 50000 0>;
40 0 4 8 16 32 64 80 96 112
68 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
76 pinctrl-0 = <&pinctrl_fec1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
88 reg = <0>;
97 pinctrl-0 = <&pinctrl_flexspi0>;
101 flash0: flash@0 {
[all …]
H A Dimx8mm-venice-gw7905.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
19 gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
49 pinctrl-0 = <&pinctrl_reg_usb2_en>;
60 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
72 pinctrl-0 = <&pinctrl_spi2>;
116 pinctrl-0 = <&pinctrl_i2c2>;
121 reg = <0x52>;
[all …]
H A Dimx8mp-venice-gw7905.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
48 pinctrl-0 = <&pinctrl_reg_usb2_en>;
59 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
72 pinctrl-0 = <&pinctrl_spi2>;
104 pinctrl-0 = <&pinctrl_i2c2>;
109 reg = <0x52>;
118 pinctrl-0 = <&pinctrl_i2c3>;
[all …]
H A Dimx8mm-venice-gw73xx.dtsi20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
70 pinctrl-0 = <&pinctrl_reg_usb1_en>;
81 pinctrl-0 = <&pinctrl_reg_usb2_en>;
92 pinctrl-0 = <&pinctrl_reg_wl>;
106 pinctrl-0 = <&pinctrl_spi2>;
130 pinctrl-0 = <&pinctrl_i2c2>;
135 pinctrl-0 = <&pinctrl_accel>;
[all …]
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso22 compatible = "gw,imx8mm-gw72xx-0x";
28 gpios = <0 GPIO_ACTIVE_HIGH>;
43 pinctrl-0 = <&pinctrl_uart2>;
56 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
57 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
58 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
H A Dimx8mm-venice-gw72xx-0x-rs485.dtso22 compatible = "gw,imx8mm-gw72xx-0x";
28 gpios = <0 GPIO_ACTIVE_HIGH>;
43 pinctrl-0 = <&pinctrl_uart2>;
56 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
57 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
58 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
H A Dimx8mm-venice-gw73xx-0x-rs485.dtso22 compatible = "gw,imx8mm-gw73xx-0x";
28 gpios = <0 GPIO_ACTIVE_HIGH>;
43 pinctrl-0 = <&pinctrl_uart2>;
56 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
57 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
58 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
H A Dimx8mm-venice-gw73xx-0x-rs422.dtso22 compatible = "gw,imx8mm-gw73xx-0x";
28 gpios = <0 GPIO_ACTIVE_HIGH>;
43 pinctrl-0 = <&pinctrl_uart2>;
56 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
57 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
58 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
H A Dimx8mn-evk.dtsi17 pinctrl-0 = <&pinctrl_gpio_led>;
40 reg = <0x0 0x40000000 0 0x80000000>;
46 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
59 pinctrl-0 = <&pinctrl_ir>;
69 #sound-dai-cells = <0>;
72 pinctrl-0 = <&pinctrl_gpio_wlf>;
124 pinctrl-0 = <&pinctrl_fec1>;
132 #size-cells = <0>;
134 ethphy0: ethernet-phy@0 {
136 reg = <0>;
[all …]
H A Dimx8mm-venice-gw72xx.dtsi20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
62 pinctrl-0 = <&pinctrl_reg_usb1_en>;
73 pinctrl-0 = <&pinctrl_reg_usb2_en>;
86 pinctrl-0 = <&pinctrl_spi2>;
110 pinctrl-0 = <&pinctrl_i2c2>;
115 pinctrl-0 = <&pinctrl_accel>;
117 reg = <0x19>;
[all …]
H A Dimx8mp-evk.dts34 pinctrl-0 = <&pinctrl_gpio_led>;
45 reg = <0x0 0x40000000 0 0xc0000000>,
46 <0x1 0x00000000 0 0xc0000000>;
51 #clock-cells = <0>;
58 pinctrl-0 = <&pinctrl_audio_pwr_reg>;
70 pinctrl-0 = <&pinctrl_flexcan1_reg>;
81 pinctrl-0 = <&pinctrl_flexcan2_reg>;
91 pinctrl-0 = <&pinctrl_pcie0_reg>;
102 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
151 pinctrl-0 = <&pinctrl_flexspi0>;
[all …]
H A Dimx8mp-beacon-kit.dts33 #size-cells = <0>;
35 port@0 {
36 reg = <0>;
56 button-0 {
88 pinctrl-0 = <&pinctrl_led3>;
90 led-0 {
117 #clock-cells = <0>;
146 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
178 pinctrl-0 = <&pinctrl_ecspi2>;
182 tpm: tpm@0 {
[all …]
H A Dimx8mm-venice-gw71xx.dtsi19 pinctrl-0 = <&pinctrl_gpio_leds>;
21 led-0 {
39 #clock-cells = <0>;
46 pinctrl-0 = <&pinctrl_pps>;
55 pinctrl-0 = <&pinctrl_spi2>;
77 pinctrl-0 = <&pinctrl_i2c2>;
82 pinctrl-0 = <&pinctrl_accel>;
84 reg = <0x19>;
96 pinctrl-0 = <&pinctrl_i2c3>;
110 pinctrl-0 = <&pinctrl_pcie0>;
[all …]
H A Dimx8mn-var-som-symphony.dts21 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
56 gpios = <&pca9534 0 GPIO_ACTIVE_LOW>;
69 pinctrl-0 = <&pinctrl_i2c2>;
74 reg = <0x20>;
77 pinctrl-0 = <&pinctrl_pca9534>;
114 reg = <0x3d>;
118 pinctrl-0 = <&pinctrl_ptn5150>;
133 reg = <0x38>;
135 pinctrl-0 = <&pinctrl_captouch>;
147 reg = <0x68>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi13 pinctrl-0 = <&pinctrl_modem_regulator>;
61 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x4b>;
70 pinctrl-0 = <&pinctrl_pmic>;
187 pinctrl-0 = <&pinctrl_i2c2>;
196 pinctrl-0 = <&pinctrl_i2c3>;
204 fsl,tx-deemph-gen1 = <0x2d>;
205 fsl,tx-deemph-gen2 = <0xf>;
211 pinctrl-0 = <&pinctrl_pcie0>;
222 pinctrl-0 = <&pinctrl_uart1>;
[all …]
H A Dimx8mp-venice-gw702x.dtsi17 reg = <0x0 0x40000000 0 0x80000000>;
33 interrupts = <0>;
84 pinctrl-0 = <&pinctrl_eqos>;
92 #size-cells = <0>;
94 ethphy0: ethernet-phy@0 {
96 pinctrl-0 = <&pinctrl_ethphy0>;
98 reg = <0x0>;
112 pinctrl-0 = <&pinctrl_i2c1>;
120 reg = <0x20>;
121 pinctrl-0 = <&pinctrl_gsc>;
[all …]

12345678910>>...30