1*2c00c065STim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*2c00c065STim Harvey/* 3*2c00c065STim Harvey * Copyright 2023 Gateworks Corporation 4*2c00c065STim Harvey */ 5*2c00c065STim Harvey 6*2c00c065STim Harvey#include <dt-bindings/gpio/gpio.h> 7*2c00c065STim Harvey#include <dt-bindings/leds/common.h> 8*2c00c065STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 9*2c00c065STim Harvey 10*2c00c065STim Harvey/ { 11*2c00c065STim Harvey led-controller { 12*2c00c065STim Harvey compatible = "gpio-leds"; 13*2c00c065STim Harvey pinctrl-names = "default"; 14*2c00c065STim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 15*2c00c065STim Harvey 16*2c00c065STim Harvey led-0 { 17*2c00c065STim Harvey function = LED_FUNCTION_STATUS; 18*2c00c065STim Harvey color = <LED_COLOR_ID_GREEN>; 19*2c00c065STim Harvey gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 20*2c00c065STim Harvey default-state = "on"; 21*2c00c065STim Harvey linux,default-trigger = "heartbeat"; 22*2c00c065STim Harvey }; 23*2c00c065STim Harvey 24*2c00c065STim Harvey led-1 { 25*2c00c065STim Harvey function = LED_FUNCTION_STATUS; 26*2c00c065STim Harvey color = <LED_COLOR_ID_RED>; 27*2c00c065STim Harvey gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 28*2c00c065STim Harvey default-state = "off"; 29*2c00c065STim Harvey }; 30*2c00c065STim Harvey }; 31*2c00c065STim Harvey 32*2c00c065STim Harvey pcie0_refclk: clock-pcie0 { 33*2c00c065STim Harvey compatible = "fixed-clock"; 34*2c00c065STim Harvey #clock-cells = <0>; 35*2c00c065STim Harvey clock-frequency = <100000000>; 36*2c00c065STim Harvey }; 37*2c00c065STim Harvey 38*2c00c065STim Harvey pps { 39*2c00c065STim Harvey compatible = "pps-gpio"; 40*2c00c065STim Harvey pinctrl-names = "default"; 41*2c00c065STim Harvey pinctrl-0 = <&pinctrl_pps>; 42*2c00c065STim Harvey gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 43*2c00c065STim Harvey status = "okay"; 44*2c00c065STim Harvey }; 45*2c00c065STim Harvey}; 46*2c00c065STim Harvey 47*2c00c065STim Harvey/* off-board header */ 48*2c00c065STim Harvey&ecspi2 { 49*2c00c065STim Harvey pinctrl-names = "default"; 50*2c00c065STim Harvey pinctrl-0 = <&pinctrl_spi2>; 51*2c00c065STim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 52*2c00c065STim Harvey status = "okay"; 53*2c00c065STim Harvey}; 54*2c00c065STim Harvey 55*2c00c065STim Harvey&gpio4 { 56*2c00c065STim Harvey gpio-line-names = 57*2c00c065STim Harvey "", "", "", "", 58*2c00c065STim Harvey "", "", "", "", 59*2c00c065STim Harvey "dio1", "", "", "dio0", 60*2c00c065STim Harvey "", "", "pci_usb_sel", "", 61*2c00c065STim Harvey "", "", "", "", 62*2c00c065STim Harvey "", "", "", "", 63*2c00c065STim Harvey "dio3", "", "dio2", "", 64*2c00c065STim Harvey "pci_wdis#", "", "", ""; 65*2c00c065STim Harvey}; 66*2c00c065STim Harvey 67*2c00c065STim Harvey&i2c2 { 68*2c00c065STim Harvey clock-frequency = <400000>; 69*2c00c065STim Harvey pinctrl-names = "default"; 70*2c00c065STim Harvey pinctrl-0 = <&pinctrl_i2c2>; 71*2c00c065STim Harvey status = "okay"; 72*2c00c065STim Harvey 73*2c00c065STim Harvey accelerometer@19 { 74*2c00c065STim Harvey compatible = "st,lis2de12"; 75*2c00c065STim Harvey reg = <0x19>; 76*2c00c065STim Harvey pinctrl-names = "default"; 77*2c00c065STim Harvey pinctrl-0 = <&pinctrl_accel>; 78*2c00c065STim Harvey st,drdy-int-pin = <1>; 79*2c00c065STim Harvey interrupt-parent = <&gpio4>; 80*2c00c065STim Harvey interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 81*2c00c065STim Harvey interrupt-names = "INT1"; 82*2c00c065STim Harvey }; 83*2c00c065STim Harvey}; 84*2c00c065STim Harvey 85*2c00c065STim Harvey&pcie_phy { 86*2c00c065STim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 87*2c00c065STim Harvey fsl,clkreq-unsupported; 88*2c00c065STim Harvey clocks = <&pcie0_refclk>; 89*2c00c065STim Harvey clock-names = "ref"; 90*2c00c065STim Harvey status = "okay"; 91*2c00c065STim Harvey}; 92*2c00c065STim Harvey 93*2c00c065STim Harvey&pcie { 94*2c00c065STim Harvey pinctrl-names = "default"; 95*2c00c065STim Harvey pinctrl-0 = <&pinctrl_pcie0>; 96*2c00c065STim Harvey reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 97*2c00c065STim Harvey status = "okay"; 98*2c00c065STim Harvey}; 99*2c00c065STim Harvey 100*2c00c065STim Harvey/* GPS */ 101*2c00c065STim Harvey&uart1 { 102*2c00c065STim Harvey pinctrl-names = "default"; 103*2c00c065STim Harvey pinctrl-0 = <&pinctrl_uart1>; 104*2c00c065STim Harvey status = "okay"; 105*2c00c065STim Harvey}; 106*2c00c065STim Harvey 107*2c00c065STim Harvey/* off-board header */ 108*2c00c065STim Harvey&uart3 { 109*2c00c065STim Harvey pinctrl-names = "default"; 110*2c00c065STim Harvey pinctrl-0 = <&pinctrl_uart3>; 111*2c00c065STim Harvey status = "okay"; 112*2c00c065STim Harvey}; 113*2c00c065STim Harvey 114*2c00c065STim Harvey/* USB1 Type-C front panel */ 115*2c00c065STim Harvey&usb3_0 { 116*2c00c065STim Harvey pinctrl-names = "default"; 117*2c00c065STim Harvey pinctrl-0 = <&pinctrl_usb1>; 118*2c00c065STim Harvey fsl,over-current-active-low; 119*2c00c065STim Harvey status = "okay"; 120*2c00c065STim Harvey}; 121*2c00c065STim Harvey 122*2c00c065STim Harvey&usb3_phy0 { 123*2c00c065STim Harvey status = "okay"; 124*2c00c065STim Harvey}; 125*2c00c065STim Harvey 126*2c00c065STim Harvey&usb_dwc3_0 { 127*2c00c065STim Harvey /* dual role is implemented but not a full featured OTG */ 128*2c00c065STim Harvey adp-disable; 129*2c00c065STim Harvey hnp-disable; 130*2c00c065STim Harvey srp-disable; 131*2c00c065STim Harvey dr_mode = "otg"; 132*2c00c065STim Harvey usb-role-switch; 133*2c00c065STim Harvey role-switch-default-mode = "peripheral"; 134*2c00c065STim Harvey status = "okay"; 135*2c00c065STim Harvey 136*2c00c065STim Harvey connector { 137*2c00c065STim Harvey compatible = "gpio-usb-b-connector", "usb-b-connector"; 138*2c00c065STim Harvey pinctrl-names = "default"; 139*2c00c065STim Harvey pinctrl-0 = <&pinctrl_usbcon1>; 140*2c00c065STim Harvey type = "micro"; 141*2c00c065STim Harvey label = "Type-C"; 142*2c00c065STim Harvey id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 143*2c00c065STim Harvey }; 144*2c00c065STim Harvey}; 145*2c00c065STim Harvey 146*2c00c065STim Harvey/* USB2 - MiniPCIe socket */ 147*2c00c065STim Harvey&usb3_1 { 148*2c00c065STim Harvey fsl,permanently-attached; 149*2c00c065STim Harvey fsl,disable-port-power-control; 150*2c00c065STim Harvey status = "okay"; 151*2c00c065STim Harvey}; 152*2c00c065STim Harvey 153*2c00c065STim Harvey&usb3_phy1 { 154*2c00c065STim Harvey status = "okay"; 155*2c00c065STim Harvey}; 156*2c00c065STim Harvey 157*2c00c065STim Harvey&usb_dwc3_1 { 158*2c00c065STim Harvey dr_mode = "host"; 159*2c00c065STim Harvey status = "okay"; 160*2c00c065STim Harvey}; 161*2c00c065STim Harvey 162*2c00c065STim Harvey&iomuxc { 163*2c00c065STim Harvey pinctrl-names = "default"; 164*2c00c065STim Harvey pinctrl-0 = <&pinctrl_hog>; 165*2c00c065STim Harvey 166*2c00c065STim Harvey pinctrl_hog: hoggrp { 167*2c00c065STim Harvey fsl,pins = < 168*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ 169*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ 170*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */ 171*2c00c065STim Harvey MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */ 172*2c00c065STim Harvey MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */ 173*2c00c065STim Harvey MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */ 174*2c00c065STim Harvey >; 175*2c00c065STim Harvey }; 176*2c00c065STim Harvey 177*2c00c065STim Harvey pinctrl_accel: accelgrp { 178*2c00c065STim Harvey fsl,pins = < 179*2c00c065STim Harvey MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */ 180*2c00c065STim Harvey >; 181*2c00c065STim Harvey }; 182*2c00c065STim Harvey 183*2c00c065STim Harvey pinctrl_gpio_leds: gpioledgrp { 184*2c00c065STim Harvey fsl,pins = < 185*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ 186*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ 187*2c00c065STim Harvey >; 188*2c00c065STim Harvey }; 189*2c00c065STim Harvey 190*2c00c065STim Harvey pinctrl_pcie0: pcie0grp { 191*2c00c065STim Harvey fsl,pins = < 192*2c00c065STim Harvey MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 193*2c00c065STim Harvey >; 194*2c00c065STim Harvey }; 195*2c00c065STim Harvey 196*2c00c065STim Harvey pinctrl_pps: ppsgrp { 197*2c00c065STim Harvey fsl,pins = < 198*2c00c065STim Harvey MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 199*2c00c065STim Harvey >; 200*2c00c065STim Harvey }; 201*2c00c065STim Harvey 202*2c00c065STim Harvey pinctrl_usb1: usb1grp { 203*2c00c065STim Harvey fsl,pins = < 204*2c00c065STim Harvey MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */ 205*2c00c065STim Harvey >; 206*2c00c065STim Harvey }; 207*2c00c065STim Harvey 208*2c00c065STim Harvey pinctrl_usbcon1: usbcon1grp { 209*2c00c065STim Harvey fsl,pins = < 210*2c00c065STim Harvey MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */ 211*2c00c065STim Harvey >; 212*2c00c065STim Harvey }; 213*2c00c065STim Harvey 214*2c00c065STim Harvey pinctrl_spi2: spi2grp { 215*2c00c065STim Harvey fsl,pins = < 216*2c00c065STim Harvey MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140 217*2c00c065STim Harvey MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140 218*2c00c065STim Harvey MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140 219*2c00c065STim Harvey MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 220*2c00c065STim Harvey >; 221*2c00c065STim Harvey }; 222*2c00c065STim Harvey 223*2c00c065STim Harvey pinctrl_uart1: uart1grp { 224*2c00c065STim Harvey fsl,pins = < 225*2c00c065STim Harvey MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 226*2c00c065STim Harvey MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 227*2c00c065STim Harvey >; 228*2c00c065STim Harvey }; 229*2c00c065STim Harvey 230*2c00c065STim Harvey pinctrl_uart3: uart3grp { 231*2c00c065STim Harvey fsl,pins = < 232*2c00c065STim Harvey MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 233*2c00c065STim Harvey MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 234*2c00c065STim Harvey >; 235*2c00c065STim Harvey }; 236*2c00c065STim Harvey}; 237