| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | atmel,at91-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
24 configured in this periph mode. All the periph and bank need to be describe.
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| H A D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A1 combined Pin and GPIO controller
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
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| H A D | pinctrl-st.txt | 1 *ST pin controller.
3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
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| /openbmc/linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-385-turris-omnia.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/leds/common.h>
16 #include "armada-385.dtsi"
20 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
23 stdout-path = &uart0;
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | mediatek,mt8188-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8188-afe
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.yaml for details.
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| H A D | renesas,rsnd.txt | 1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
22 * Multi channel
25 Multi channel is supported by Multi-SSI, or TDM-SSI.
27 Multi-SSI : 6ch case, you can use stereo x 3 SSI
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| H A D | mt8195-afe-pcm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8195-audio
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.txt for details.
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| /openbmc/linux/sound/pci/hda/ |
| H A D | hda_generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */ member
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
48 unsigned char multi[MAX_NID_PATH_DEPTH]; member
52 bool pin_fixed:1; /* path with fixed pin */
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| /openbmc/u-boot/doc/ |
| H A D | README.bitbangMII | 1 This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to
4 buses are implemented via bit-banging mode.
9 CONFIG_BITBANGMII - Enable the miiphybb driver
10 CONFIG_BITBANGMII_MULTI - Enable the multi bus support
15 MII_INIT - Generic code to enable the MII bus (optional)
16 MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
17 MDIO_ACTIVE - Activate the MDIO pin as out pin
18 MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
19 MDIO_READ - Read the MDIO pin
20 MDIO(v) - Write v on the MDIO pin
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| /openbmc/linux/Documentation/sound/hd-audio/ |
| H A D | models.rst | 2 HD-Audio Codec-Specific Models
8 3-jack in back and a headphone out
9 3stack-digout
10 3-jack in back, a HP out and a SPDIF out
12 5-jack in back, 2-jack in front
13 5stack-digout
14 5-jack in back, 2-jack in front, a SPDIF out
16 6-jack in back, 2-jack in front
17 6stack-digout
18 6-jack with a SPDIF out
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| H A D | controls.rst | 2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
11 Channel Mode
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
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| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | multi-inno,mi0283qt.txt | 1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
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| /openbmc/u-boot/board/Marvell/mvebu_armada-37xx/ |
| H A D | board.c | 1 // SPDX-License-Identifier: GPL-2.0+
23 /* The pin control values are the same for DB and Espressobin */
28 /* SMI addresses for multi-chip mode */
32 /* Multi-chip mode */
41 /* Single-chip mode */
58 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; in board_init()
71 if (!of_machine_is_compatible("marvell,armada-3720-db")) in board_ahci_enable()
84 return -EIO; in board_ahci_enable()
89 * the corresponding bit to output mode to enable power for SATA in board_ahci_enable()
95 return -EIO; in board_ahci_enable()
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| /openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_pio.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
9 * Parallel I/O Controller (PIO) - System peripherals registers.
54 u32 pdsr; /* 0x3C Pin Data Status Register */
59 u32 mder; /* 0x50 Multi-driver Enable Register */
60 u32 mddr; /* 0x54 Multi-driver Disable Register */
61 u32 mdsr; /* 0x58 Multi-driver Status Register */
63 u32 pudr; /* 0x60 Pull-up Disable Register */
64 u32 puer; /* 0x64 Pull-up Enable Register */
65 u32 pusr; /* 0x68 Pad Pull-up Status Register */
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| /openbmc/linux/sound/soc/sof/ |
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) - 1)))
22 * LL domain - Low latency domain
23 * DP domain - Data processing domain
66 * The base of multi-gateways. Multi-gateways addressing starts from
67 * ALH_MULTI_GTW_BASE and there are ALH_MULTI_GTW_COUNT multi-sources
68 * and ALH_MULTI_GTW_COUNT multi-sinks available.
70 * ALH_MULTI_GTW_BASE + ALH_MULTI_GTW_COUNT - 1.
94 * HD-A gateways.
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| /openbmc/linux/drivers/watchdog/ |
| H A D | f71808e_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
22 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
23 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
31 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
33 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
34 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
35 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
74 pin number 63 */
96 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | turris1x.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
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| /openbmc/linux/arch/m68k/coldfire/ |
| H A D | m527x.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * m527x.c -- platform support for ColdFire 527x based boards
7 * Sub-architcture dependent initialization code for the Freescale
10 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
11 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
45 CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),
77 /* setup Port FECI2C Pin Assignment Register for I2C */ in m527x_i2c_init()
85 /* setup Port FECI2C Pin Assignment Register for I2C */ in m527x_i2c_init()
101 * External Pin Mask Setting & Enable External Pin for Interface in m527x_uarts_init()
114 /* Set multi-function pins to ethernet mode for fec0 */ in m527x_fec_init()
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| /openbmc/linux/include/linux/soc/pxa/ |
| H A D | mfp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Common Multi-Function Pin Definitions
7 * 2007-8-21: eric miao <eric.miao@marvell.com>
18 MFP_PIN_INVALID = -1,
325 * a possible MFP configuration is represented by a 32-bit integer
327 * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
328 * bit 10..12 - Alternate Function Selection
329 * bit 13..15 - Drive Strength
330 * bit 16..18 - Low Power Mode State
331 * bit 19..20 - Low Power Mode Edge Detection
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| /openbmc/linux/drivers/soc/pxa/ |
| H A D | mfp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/plat-pxa/mfp.c
5 * Multi-Function Pin Support
9 * 2007-08-21: eric miao <eric.miao@marvell.com>
43 * used in parentheses for don't-care values. Except for the float output,
45 * non-LPM pulled output, the same configuration could probably be used.
66 * The pullup and pulldown state of the MFP pin at run mode is by default
85 * (most likely a read-modify-write operation) is atomic, and that
93 unsigned long config; /* -1 for not configured */
95 unsigned long mfpr_run; /* Run-Mode Register Value */
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | at91rm9200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14 be accessed via the external address space read mode or the manual mode.
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
19 - if it contains "jedec,spi-nor", then SPI is used;
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| /openbmc/linux/Documentation/arch/arm/pxa/ |
| H A D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
18 detection of each pin. Below is a diagram of internal connections between
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
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| /openbmc/linux/Documentation/devicetree/bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
31 - enum:
33 - acbel,fsg032
34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
35 - ad,ad7414
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| /openbmc/linux/Documentation/devicetree/bindings/leds/ |
| H A D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
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