1ab1c3620SSergei Shtylyov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ab1c3620SSergei Shtylyov%YAML 1.2 3ab1c3620SSergei Shtylyov--- 4ab1c3620SSergei Shtylyov$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5ab1c3620SSergei Shtylyov$schema: http://devicetree.org/meta-schemas/core.yaml# 6ab1c3620SSergei Shtylyov 7ab1c3620SSergei Shtylyovtitle: Renesas Reduced Pin Count Interface (RPC-IF) 8ab1c3620SSergei Shtylyov 9ab1c3620SSergei Shtylyovmaintainers: 10ab1c3620SSergei Shtylyov - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11ab1c3620SSergei Shtylyov 12ab1c3620SSergei Shtylyovdescription: | 13ab1c3620SSergei Shtylyov Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 14ab1c3620SSergei Shtylyov be accessed via the external address space read mode or the manual mode. 15ab1c3620SSergei Shtylyov 16ab1c3620SSergei Shtylyov The flash chip itself should be represented by a subnode of the RPC-IF node. 17ab1c3620SSergei Shtylyov The flash interface is selected based on the "compatible" property of this 18ab1c3620SSergei Shtylyov subnode: 19ab1c3620SSergei Shtylyov - if it contains "jedec,spi-nor", then SPI is used; 20ab1c3620SSergei Shtylyov - if it contains "cfi-flash", then HyperFlash is used. 21ab1c3620SSergei Shtylyov 22ab1c3620SSergei ShtylyovallOf: 23*69d170c4SRob Herring - $ref: /schemas/spi/spi-controller.yaml# 24ab1c3620SSergei Shtylyov 25ab1c3620SSergei Shtylyovproperties: 26ab1c3620SSergei Shtylyov compatible: 27c271aa1fSLad Prabhakar oneOf: 28c271aa1fSLad Prabhakar - items: 29ab1c3620SSergei Shtylyov - enum: 308e919918SAdam Ford - renesas,r8a774a1-rpc-if # RZ/G2M 318e919918SAdam Ford - renesas,r8a774b1-rpc-if # RZ/G2N 328e919918SAdam Ford - renesas,r8a774c0-rpc-if # RZ/G2E 338e919918SAdam Ford - renesas,r8a774e1-rpc-if # RZ/G2H 348f0e3af8SGeert Uytterhoeven - renesas,r8a7795-rpc-if # R-Car H3 358f0e3af8SGeert Uytterhoeven - renesas,r8a7796-rpc-if # R-Car M3-W 368f0e3af8SGeert Uytterhoeven - renesas,r8a77961-rpc-if # R-Car M3-W+ 378f0e3af8SGeert Uytterhoeven - renesas,r8a77965-rpc-if # R-Car M3-N 38ab1c3620SSergei Shtylyov - renesas,r8a77970-rpc-if # R-Car V3M 39ab1c3620SSergei Shtylyov - renesas,r8a77980-rpc-if # R-Car V3H 408f0e3af8SGeert Uytterhoeven - renesas,r8a77990-rpc-if # R-Car E3 41ab1c3620SSergei Shtylyov - renesas,r8a77995-rpc-if # R-Car D3 42797f0827SWolfram Sang - renesas,r8a779a0-rpc-if # R-Car V3U 43c271aa1fSLad Prabhakar - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device 44c271aa1fSLad Prabhakar 45c271aa1fSLad Prabhakar - items: 46c271aa1fSLad Prabhakar - enum: 47fad9489aSHai Pham - renesas,r8a779g0-rpc-if # R-Car V4H 48fad9489aSHai Pham - const: renesas,rcar-gen4-rpc-if # a generic R-Car gen4 device 49fad9489aSHai Pham 50fad9489aSHai Pham - items: 51fad9489aSHai Pham - enum: 525652dc5cSBiju Das - renesas,r9a07g043-rpc-if # RZ/G2UL 53c271aa1fSLad Prabhakar - renesas,r9a07g044-rpc-if # RZ/G2{L,LC} 5469d69419SLad Prabhakar - renesas,r9a07g054-rpc-if # RZ/V2L 5569d69419SLad Prabhakar - const: renesas,rzg2l-rpc-if 56ab1c3620SSergei Shtylyov 57ab1c3620SSergei Shtylyov reg: 58ab1c3620SSergei Shtylyov items: 59ab1c3620SSergei Shtylyov - description: RPC-IF registers 60ab1c3620SSergei Shtylyov - description: direct mapping read mode area 61ab1c3620SSergei Shtylyov - description: write buffer area 62ab1c3620SSergei Shtylyov 63ab1c3620SSergei Shtylyov reg-names: 64ab1c3620SSergei Shtylyov items: 65ab1c3620SSergei Shtylyov - const: regs 66ab1c3620SSergei Shtylyov - const: dirmap 67ab1c3620SSergei Shtylyov - const: wbuf 68ab1c3620SSergei Shtylyov 69c271aa1fSLad Prabhakar clocks: true 70ab1c3620SSergei Shtylyov 714b5a231fSLad Prabhakar interrupts: 724b5a231fSLad Prabhakar maxItems: 1 734b5a231fSLad Prabhakar 74ab1c3620SSergei Shtylyov power-domains: 75ab1c3620SSergei Shtylyov maxItems: 1 76ab1c3620SSergei Shtylyov 77ab1c3620SSergei Shtylyov resets: 78ab1c3620SSergei Shtylyov maxItems: 1 79ab1c3620SSergei Shtylyov 80ab1c3620SSergei ShtylyovpatternProperties: 81ab1c3620SSergei Shtylyov "flash@[0-9a-f]+$": 82ab1c3620SSergei Shtylyov type: object 83ab1c3620SSergei Shtylyov properties: 84ab1c3620SSergei Shtylyov compatible: 85dbe60e5dSGeert Uytterhoeven contains: 86ab1c3620SSergei Shtylyov enum: 87ab1c3620SSergei Shtylyov - cfi-flash 88ab1c3620SSergei Shtylyov - jedec,spi-nor 89ab1c3620SSergei Shtylyov 90dbe60e5dSGeert Uytterhoevenrequired: 91dbe60e5dSGeert Uytterhoeven - compatible 92dbe60e5dSGeert Uytterhoeven - reg 93dbe60e5dSGeert Uytterhoeven - reg-names 94dbe60e5dSGeert Uytterhoeven - clocks 95dbe60e5dSGeert Uytterhoeven - power-domains 96dbe60e5dSGeert Uytterhoeven - resets 97dbe60e5dSGeert Uytterhoeven - '#address-cells' 98dbe60e5dSGeert Uytterhoeven - '#size-cells' 99dbe60e5dSGeert Uytterhoeven 100c271aa1fSLad Prabhakarif: 101c271aa1fSLad Prabhakar properties: 102c271aa1fSLad Prabhakar compatible: 103c271aa1fSLad Prabhakar contains: 104c271aa1fSLad Prabhakar enum: 105c271aa1fSLad Prabhakar - renesas,rzg2l-rpc-if 106c271aa1fSLad Prabhakarthen: 107c271aa1fSLad Prabhakar properties: 108c271aa1fSLad Prabhakar clocks: 109c271aa1fSLad Prabhakar items: 110c271aa1fSLad Prabhakar - description: SPI Multi IO Register access clock (SPI_CLK2) 111c271aa1fSLad Prabhakar - description: SPI Multi IO Main clock (SPI_CLK). 112c271aa1fSLad Prabhakar 113c271aa1fSLad Prabhakarelse: 114c271aa1fSLad Prabhakar properties: 115c271aa1fSLad Prabhakar clocks: 116c271aa1fSLad Prabhakar maxItems: 1 117c271aa1fSLad Prabhakar 118c271aa1fSLad PrabhakarunevaluatedProperties: false 119c271aa1fSLad Prabhakar 120ab1c3620SSergei Shtylyovexamples: 121ab1c3620SSergei Shtylyov - | 122ab1c3620SSergei Shtylyov #include <dt-bindings/clock/renesas-cpg-mssr.h> 123ab1c3620SSergei Shtylyov #include <dt-bindings/power/r8a77995-sysc.h> 124ab1c3620SSergei Shtylyov 125ab1c3620SSergei Shtylyov spi@ee200000 { 126ab1c3620SSergei Shtylyov compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; 127ab1c3620SSergei Shtylyov reg = <0xee200000 0x200>, 128ab1c3620SSergei Shtylyov <0x08000000 0x4000000>, 129ab1c3620SSergei Shtylyov <0xee208000 0x100>; 130ab1c3620SSergei Shtylyov reg-names = "regs", "dirmap", "wbuf"; 131ab1c3620SSergei Shtylyov clocks = <&cpg CPG_MOD 917>; 132ab1c3620SSergei Shtylyov power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 133ab1c3620SSergei Shtylyov resets = <&cpg 917>; 134ab1c3620SSergei Shtylyov #address-cells = <1>; 135ab1c3620SSergei Shtylyov #size-cells = <0>; 136ab1c3620SSergei Shtylyov 137ab1c3620SSergei Shtylyov flash@0 { 138ab1c3620SSergei Shtylyov compatible = "jedec,spi-nor"; 139ab1c3620SSergei Shtylyov reg = <0>; 140ab1c3620SSergei Shtylyov spi-max-frequency = <40000000>; 141ab1c3620SSergei Shtylyov spi-tx-bus-width = <1>; 142ab1c3620SSergei Shtylyov spi-rx-bus-width = <1>; 143ab1c3620SSergei Shtylyov }; 144ab1c3620SSergei Shtylyov }; 145