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/openbmc/qemu/docs/system/arm/
H A Dcpu-features.rst10 Cortex-A15 and the Cortex-A57, which respectively implement Arm
11 architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
12 implement PMUs. For example, if a user wants to use a Cortex-A15 without
13 a PMU, then the ``-cpu`` parameter should contain ``pmu=off`` on the QEMU
14 command line, i.e. ``-cpu cortex-a15,pmu=off``.
18 that implement the ARMv8-A architecture reference manual may optionally
20 ``aarch64`` CPU property. A CPU type such as the Cortex-A15, which does
21 not implement ARMv8-A, will not have the ``aarch64`` CPU property.
27 when using the KVM accelerator and when running on a host CPU type that
28 supports the feature. While ``aarch64`` currently only works with KVM,
[all …]
H A Dvirt.rst8 idiosyncrasies and limitations of a particular bit of real-world
16 ``virt-5.0`` machine type will behave like the ``virt`` machine from
17 the QEMU 5.0 release, and migration should work between ``virt-5.0``
18 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
20 the non-versioned ``virt`` machine type.
27 - PCI/PCIe devices
28 - Flash memory
29 - Either one or two PL011 UARTs for the NonSecure World
30 - An RTC
31 - The fw_cfg device that allows a guest to obtain data from QEMU
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/openbmc/qemu/.gitlab-ci.d/
H A Dcrossbuilds.yml2 - local: '/.gitlab-ci.d/crossbuild-template.yml'
4 cross-armhf-user:
7 job: armhf-debian-cross-container
9 IMAGE: debian-armhf-cross
11 cross-arm64-system:
14 job: arm64-debian-cross-container
16 IMAGE: debian-arm64-cross
18 cross-arm64-user:
21 job: arm64-debian-cross-container
23 IMAGE: debian-arm64-cross
[all …]
H A Dcrossbuild-template.yml7 - ccache
12 - source scripts/ci/gitlab-ci-section
13 - section_start setup "Pre-script setup"
14 - JOBS=$(expr $(nproc) + 1)
15 - cat /packages.txt
16 - section_end setup
18 - export CCACHE_BASEDIR="$(pwd)"
19 - export CCACHE_DIR="$CCACHE_BASEDIR/ccache"
20 - export CCACHE_MAXSIZE="500M"
21 - export PATH="$CCACHE_WRAPPERSDIR:$PATH"
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/openbmc/qemu/tests/qtest/
H A Darm-cpu-features.c9 * See the COPYING file in the top-level directory.
18 * We expect the SVE max-vq to be 16. Also it must be <= 64
23 #define MACHINE "-machine virt,gic-version=max -accel tcg "
24 #define MACHINE_KVM "-machine virt,gic-version=max -accel kvm "
25 #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \
191 resp = qtest_qmp(qts, "{ 'execute': 'query-cpu-model-expansion', " in assert_type_full()
207 resp = qtest_qmp(qts, "{ 'execute': 'query-cpu-model-expansion', " in assert_bad_props()
234 if (strlen(e->key) > 3 && !strncmp(e->key, "sve", 3) && in resp_get_sve_vls()
235 g_ascii_isdigit(e->key[3])) { in resp_get_sve_vls()
239 bits = g_ascii_strtoll(&e->key[3], &endptr, 10); in resp_get_sve_vls()
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/openbmc/linux/tools/testing/selftests/wireguard/qemu/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
13 CBUILD := $(shell gcc -dumpmachine)
14 HOST_ARCH := $(firstword $(subst -, ,$(CBUILD)))
19 MIRROR := https://download.wireguard.com/qemu-test/distfiles/
21 KERNEL_BUILD_PATH := $(BUILD_PATH)/kernel$(if $(findstring yes,$(DEBUG_KERNEL)),-debug)
28 $(1)_NAME := $(2)-$$($(1)_VERSION)
36 mkdir -p $(DISTFILES_PATH)
37 …-x $$@.lock -c '[ -f $$@ ] && exit 0; wget -O $$@.tmp $(MIRROR)$(1) || wget -O $$@.tmp $(2)$(1) ||…
46 … $(call tar_download,WIREGUARD_TOOLS,wireguard-tools,1.0.20210914,.tar.xz,https://git.zx2c4.com/wi…
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/openbmc/qemu/docs/system/i386/
H A Dmicrovm.rst8 designed for short-lived guests. microvm also establishes a baseline
14 -----------------
18 - ISA bus
19 - i8259 PIC (optional)
20 - i8254 PIT (optional)
21 - MC146818 RTC (optional)
22 - One ISA serial port (optional)
23 - LAPIC
24 - IOAPIC (with kernel-irqchip=split by default)
25 - kvmclock (if using KVM)
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/openbmc/openbmc/poky/meta/recipes-devtools/qemu/
H A Dqemu.inc7 LICENSE = "GPL-2.0-only & LGPL-2.1-only"
9 DEPENDS += "bison-native meson-native ninja-native"
11 RDEPENDS:${PN}-ptest = "bash"
13 require qemu-targets.inc
14 # https://gitlab.com/qemu-project/qemu/-/commit/81e2b198a8cb4ee5fdf108bd438f44b193ee3a36 means
15 # we need a full python3-native setup
16 inherit pkgconfig ptest update-rc.d systemd python3native
21 SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \
23 file://run-ptest \
24 file://fix-strerrorname_np.patch \
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/openbmc/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
31 If set to none, disable the ACPI backlight interface.
40 Disable AML predefined validation mechanism
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/openbmc/qemu/docs/devel/
H A Dtracing.rst19 $ qemu --trace "memory_region_ops_*" ...
25 ``./configure --enable-trace-backends=BACKENDS`` was not explicitly specified.
27 Multiple patterns can be specified by repeating the ``--trace`` option::
29 $ qemu --trace "kvm_*" --trace "virtio_*" ...
32 file to avoid long command-line options::
36 $ qemu --trace events=/tmp/events ...
41 Sub-directory setup
42 -------------------
45 "trace-events" file. All directories which contain "trace-events" files must be
47 file. During build, the "trace-events" file in each listed subdirectory will be
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/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dvmx_pmu_caps_test.c1 // SPDX-License-Identifier: GPL-2.0
3 * Test for VMX-pmu perf capability msr
39 * fungible (if supported by the host and KVM).
42 .lbr_format = -1,
45 .pebs_format = -1,
50 .lbr_format = -1,
51 .pebs_format = -1,
112 TEST_ASSERT(!r, "Post-KVM_RUN write '0' didn't fail"); in test_guest_wrmsr_perf_capabilities()
117 TEST_ASSERT(!r, "Post-KVM_RUN write '0x%llx'didn't fail", in test_guest_wrmsr_perf_capabilities()
125 * Verify KVM allows writing PERF_CAPABILITIES with all KVM-supported features
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/openbmc/linux/tools/perf/Documentation/
H A Dperf-intel-pt.txt1 perf-intel-pt(1)
5 ----
6 perf-intel-pt - Support for Intel Processor Trace within perf tools
9 --------
11 'perf record' -e intel_pt//
14 -----------
19 Technical details are documented in the Intel 64 and IA-32 Architectures
23 processors that are based on the Intel micro-architecture code name Broadwell.
33 Decoding is done on-the-fly. The decoder outputs samples in the same format as
43 builds, however the executed images are needed - which makes use in JIT-compiled
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/openbmc/qemu/target/arm/
H A Dcpu64.c18 * <http://www.gnu.org/licenses/gpl-2.0.html>
27 #include "sysemu/kvm.h"
34 #include "hw/qdev-properties.h"
36 #include "cpu-features.h"
43 * then all other lengths are implicitly disabled. If sve-max-vq is in arm_cpu_sve_finalize()
47 * are enabled and sve-max-vq is not specified, then all lengths not in arm_cpu_sve_finalize()
48 * explicitly disabled will be enabled. Additionally, all power-of-two in arm_cpu_sve_finalize()
51 * disabled power-of-two vector length will be automatically disabled. in arm_cpu_sve_finalize()
56 uint32_t vq_map = cpu->sve_vq.map; in arm_cpu_sve_finalize()
57 uint32_t vq_init = cpu->sve_vq.init; in arm_cpu_sve_finalize()
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/openbmc/linux/tools/arch/mips/include/uapi/asm/
H A Dkvm.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
18 * KVM MIPS specific structures and definitions.
26 * If Config[AT] is zero (32-bit CPU), the register contents are
27 * stored in the lower 32-bits of the struct kvm_regs fields and sign
28 * extended to 64-bits.
49 * bits[63..52] - As per linux/kvm.h
50 * bits[51..32] - Must be zero.
51 * bits[31..16] - Register set.
56 * bits[15..8] - Must be zero.
57 * bits[7..3] - Register 'rd' index.
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/openbmc/linux/arch/arm64/kvm/hyp/nvhe/
H A Dswitch.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 - ARM Ltd
8 #include <hyp/sysreg-sr.h>
10 #include <linux/arm-smccc.h>
16 #include <kvm/arm_psci.h>
26 #include <asm/debug-monitors.h>
32 /* Non-VHE specific context */
46 val = vcpu->arch.cptr_el2; in __activate_traps()
70 struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt; in __activate_traps()
109 write_sysreg(this_cpu_ptr(&kvm_init_params)->hcr_el2, hcr_el2); in __deactivate_traps()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for Kernel-based Virtual Machine module, HYP/nVHE part
6 asflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS
8 # Tracepoint and MMIO logging symbols should not be visible at nVHE KVM as
9 # there is no way to execute them and any such MMIO access from nVHE KVM
11 # __DISABLE_TRACE_MMIO__ to disable MMIO tracing for nVHE KVM.
12 ccflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS -D__DISABLE_TRACE_MMIO__
13 ccflags-y += -fno-stack-protector \
14 -DDISABLE_BRANCH_PROFILING \
17 hostprogs := gen-hyprel
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/openbmc/qemu/tests/avocado/
H A Dintel_iommu.py9 # later. See the COPYING file in the top-level directory.
22 :avocado: tags=accel:kvm
27 IOMMU_ADDON = ',iommu_platform=on,disable-modern=off,disable-legacy=on'
34 self.vm.add_args('-device', 'virtio-blk-pci,bus=pcie.0,' +
35 'drive=drv0,id=virtio-disk0,bootindex=1,'
37 self.vm.add_args('-device', 'virtio-gpu-pci' + self.IOMMU_ADDON)
38 self.vm.add_args('-drive',
42 super(IntelIOMMU, self).setUp(None, 'virtio-net-pci' + self.IOMMU_ADDON)
45 self.vm.add_args('-device', 'virtio-rng-pci,rng=rng0')
46 self.vm.add_args('-object',
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H A Dsmmu.py9 # later. See the COPYING file in the top-level directory.
19 :avocado: tags=accel:kvm
28 IOMMU_ADDON = ',iommu_platform=on,disable-modern=off,disable-legacy=on'
35 self.vm.add_args('-device', 'virtio-blk-pci,bus=pcie.0,' +
36 'drive=drv0,id=virtio-disk0,bootindex=1,'
38 self.vm.add_args('-drive',
42 super(SMMU, self).setUp(None, 'virtio-net-pci' + self.IOMMU_ADDON)
45 self.require_accelerator("kvm")
46 self.vm.add_args("-accel", "kvm")
47 self.vm.add_args("-cpu", "host")
[all …]
/openbmc/linux/arch/mips/include/uapi/asm/
H A Dkvm.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
18 * KVM MIPS specific structures and definitions.
30 * If Config[AT] is zero (32-bit CPU), the register contents are
31 * stored in the lower 32-bits of the struct kvm_regs fields and sign
32 * extended to 64-bits.
53 * bits[63..52] - As per linux/kvm.h
54 * bits[51..32] - Must be zero.
55 * bits[31..16] - Register set.
60 * bits[15..8] - COP0 register set.
63 * bits[7..3] - Register 'rd' index.
[all …]
/openbmc/qemu/linux-headers/asm-mips/
H A Dkvm.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
18 * KVM MIPS specific structures and definitions.
28 * If Config[AT] is zero (32-bit CPU), the register contents are
29 * stored in the lower 32-bits of the struct kvm_regs fields and sign
30 * extended to 64-bits.
51 * bits[63..52] - As per linux/kvm.h
52 * bits[51..32] - Must be zero.
53 * bits[31..16] - Register set.
58 * bits[15..8] - COP0 register set.
61 * bits[7..3] - Register 'rd' index.
[all …]
/openbmc/linux/arch/x86/kvm/
H A Di8254.c4 * Copyright (c) 2003-2004 Fabrice Bellard
44 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
56 struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; in pit_set_gate()
58 switch (c->mode) { in pit_set_gate()
62 /* XXX: just disable/enable counting */ in pit_set_gate()
69 if (c->gate < val) in pit_set_gate()
70 c->count_load_time = ktime_get(); in pit_set_gate()
74 c->gate = val; in pit_set_gate()
79 return pit->pit_state.channels[channel].gate; in pit_get_gate()
86 struct kvm_kpit_state *ps = &pit->pit_state; in __kpit_elapsed()
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H A Dpmu.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
9 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu)
49 * greater than zero. However, KVM only exposes and emulates the MSR in kvm_pmu_has_perf_global_ctrl()
55 return pmu->version > 1; in kvm_pmu_has_perf_global_ctrl()
62 return pmu->counter_bitmask[pmc->type]; in pmc_bitmask()
69 counter = pmc->counter; in pmc_read_counter()
70 if (pmc->perf_event && !pmc->is_paused) in pmc_read_counter()
71 counter += perf_event_read_value(pmc->perf_event, in pmc_read_counter()
79 pmc->counter += val - pmc_read_counter(pmc); in pmc_write_counter()
[all …]
/openbmc/linux/Documentation/virt/kvm/arm/
H A Dhyp-abi.rst1 .. SPDX-License-Identifier: GPL-2.0
9 KVM). It doesn't cover the interaction of the kernel with the
10 hypervisor when running as a guest (under Xen, KVM or any other
11 hypervisor), or any hypervisor-specific interaction when the kernel is
14 Note: KVM/arm has been removed from the kernel. The API described
16 booted at HYP. It can also be used by a hypervisor other than KVM
20 mode, but still needs to interact with it, allowing a built-in
28 Unless specified otherwise, any built-in hypervisor must implement
57 Mask all exceptions, disable the MMU, clear I+D bits, move the arguments
65 Finish configuring EL2 depending on the command-line options,
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/openbmc/linux/arch/mips/kvm/
H A Dmips.c6 * KVM/MIPS: MIPS specific KVM APIs
115 return !!(vcpu->arch.pending_exceptions); in kvm_arch_vcpu_runnable()
130 return kvm_mips_callbacks->hardware_enable(); in kvm_arch_hardware_enable()
135 kvm_mips_callbacks->hardware_disable(); in kvm_arch_hardware_disable()
138 extern void kvm_init_loongson_ipi(struct kvm *kvm);
140 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) in kvm_arch_init_vm() argument
148 /* Unsupported KVM type */ in kvm_arch_init_vm()
149 return -EINVAL; in kvm_arch_init_vm()
152 /* Allocate page table to map GPA -> RPA */ in kvm_arch_init_vm()
153 kvm->arch.gpa_mm.pgd = kvm_pgd_alloc(); in kvm_arch_init_vm()
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/openbmc/linux/kernel/entry/
H A Dkvm.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/entry-kvm.h>
13 return -EINTR; in xfer_to_guest_mode_work()
39 * KVM invokes xfer_to_guest_mode_work_pending() with interrupts in xfer_to_guest_mode_handle_work()
41 * to disable interrupts here. in xfer_to_guest_mode_handle_work()

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