169bf758bSMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0 269bf758bSMauro Carvalho Chehab 369bf758bSMauro Carvalho Chehab======================================= 469bf758bSMauro Carvalho ChehabInternal ABI between the kernel and HYP 569bf758bSMauro Carvalho Chehab======================================= 669bf758bSMauro Carvalho Chehab 769bf758bSMauro Carvalho ChehabThis file documents the interaction between the Linux kernel and the 869bf758bSMauro Carvalho Chehabhypervisor layer when running Linux as a hypervisor (for example 969bf758bSMauro Carvalho ChehabKVM). It doesn't cover the interaction of the kernel with the 1069bf758bSMauro Carvalho Chehabhypervisor when running as a guest (under Xen, KVM or any other 1169bf758bSMauro Carvalho Chehabhypervisor), or any hypervisor-specific interaction when the kernel is 1269bf758bSMauro Carvalho Chehabused as a host. 1369bf758bSMauro Carvalho Chehab 14541ad015SMarc ZyngierNote: KVM/arm has been removed from the kernel. The API described 15541ad015SMarc Zyngierhere is still valid though, as it allows the kernel to kexec when 16541ad015SMarc Zyngierbooted at HYP. It can also be used by a hypervisor other than KVM 17541ad015SMarc Zyngierif necessary. 18541ad015SMarc Zyngier 1969bf758bSMauro Carvalho ChehabOn arm and arm64 (without VHE), the kernel doesn't run in hypervisor 2069bf758bSMauro Carvalho Chehabmode, but still needs to interact with it, allowing a built-in 2169bf758bSMauro Carvalho Chehabhypervisor to be either installed or torn down. 2269bf758bSMauro Carvalho Chehab 2369bf758bSMauro Carvalho ChehabIn order to achieve this, the kernel must be booted at HYP (arm) or 2469bf758bSMauro Carvalho ChehabEL2 (arm64), allowing it to install a set of stubs before dropping to 2569bf758bSMauro Carvalho ChehabSVC/EL1. These stubs are accessible by using a 'hvc #0' instruction, 2669bf758bSMauro Carvalho Chehaband only act on individual CPUs. 2769bf758bSMauro Carvalho Chehab 2869bf758bSMauro Carvalho ChehabUnless specified otherwise, any built-in hypervisor must implement 2969bf758bSMauro Carvalho Chehabthese functions (see arch/arm{,64}/include/asm/virt.h): 3069bf758bSMauro Carvalho Chehab 3169bf758bSMauro Carvalho Chehab* :: 3269bf758bSMauro Carvalho Chehab 3369bf758bSMauro Carvalho Chehab r0/x0 = HVC_SET_VECTORS 3469bf758bSMauro Carvalho Chehab r1/x1 = vectors 3569bf758bSMauro Carvalho Chehab 3669bf758bSMauro Carvalho Chehab Set HVBAR/VBAR_EL2 to 'vectors' to enable a hypervisor. 'vectors' 3769bf758bSMauro Carvalho Chehab must be a physical address, and respect the alignment requirements 3869bf758bSMauro Carvalho Chehab of the architecture. Only implemented by the initial stubs, not by 3969bf758bSMauro Carvalho Chehab Linux hypervisors. 4069bf758bSMauro Carvalho Chehab 4169bf758bSMauro Carvalho Chehab* :: 4269bf758bSMauro Carvalho Chehab 4369bf758bSMauro Carvalho Chehab r0/x0 = HVC_RESET_VECTORS 4469bf758bSMauro Carvalho Chehab 4569bf758bSMauro Carvalho Chehab Turn HYP/EL2 MMU off, and reset HVBAR/VBAR_EL2 to the initials 4669bf758bSMauro Carvalho Chehab stubs' exception vector value. This effectively disables an existing 4769bf758bSMauro Carvalho Chehab hypervisor. 4869bf758bSMauro Carvalho Chehab 4969bf758bSMauro Carvalho Chehab* :: 5069bf758bSMauro Carvalho Chehab 5169bf758bSMauro Carvalho Chehab r0/x0 = HVC_SOFT_RESTART 5269bf758bSMauro Carvalho Chehab r1/x1 = restart address 5369bf758bSMauro Carvalho Chehab x2 = x0's value when entering the next payload (arm64) 5469bf758bSMauro Carvalho Chehab x3 = x1's value when entering the next payload (arm64) 5569bf758bSMauro Carvalho Chehab x4 = x2's value when entering the next payload (arm64) 5669bf758bSMauro Carvalho Chehab 573a179306SPingfan Liu Mask all exceptions, disable the MMU, clear I+D bits, move the arguments 583a179306SPingfan Liu into place (arm64 only), and jump to the restart address while at HYP/EL2. 593a179306SPingfan Liu This hypercall is not expected to return to its caller. 6069bf758bSMauro Carvalho Chehab 61166cc2a4SMarc Zyngier* :: 62166cc2a4SMarc Zyngier 63*7ddb0c3dSMarc Zyngier x0 = HVC_FINALISE_EL2 (arm64 only) 64166cc2a4SMarc Zyngier 65*7ddb0c3dSMarc Zyngier Finish configuring EL2 depending on the command-line options, 66*7ddb0c3dSMarc Zyngier including an attempt to upgrade the kernel's exception level from 67*7ddb0c3dSMarc Zyngier EL1 to EL2 by enabling the VHE mode. This is conditioned by the CPU 68*7ddb0c3dSMarc Zyngier supporting VHE, the EL2 MMU being off, and VHE not being disabled by 69*7ddb0c3dSMarc Zyngier any other means (command line option, for example). 70166cc2a4SMarc Zyngier 7169bf758bSMauro Carvalho ChehabAny other value of r0/x0 triggers a hypervisor-specific handling, 7269bf758bSMauro Carvalho Chehabwhich is not documented here. 7369bf758bSMauro Carvalho Chehab 7469bf758bSMauro Carvalho ChehabThe return value of a stub hypercall is held by r0/x0, and is 0 on 7569bf758bSMauro Carvalho Chehabsuccess, and HVC_STUB_ERR on error. A stub hypercall is allowed to 7669bf758bSMauro Carvalho Chehabclobber any of the caller-saved registers (x0-x18 on arm64, r0-r3 and 7769bf758bSMauro Carvalho Chehabip on arm). It is thus recommended to use a function call to perform 7869bf758bSMauro Carvalho Chehabthe hypercall. 79