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Searched defs:pll1_cfg (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun4i.c95 u32 pll1_cfg; member
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun4i.h14 u32 pll1_cfg; /* 0x00 pll1 control */ member
H A Dclock_sun50i_h6.h13 u32 pll1_cfg; /* 0x000 pll1 (cpux) control */ member
H A Dclock_sun6i.h14 u32 pll1_cfg; /* 0x00 pll1 control */ member