| /openbmc/linux/arch/xtensa/variants/fsf/include/variant/ |
| H A D | core.h | 117 #define XCHAL_DCACHE_LINEWIDTH 4 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-fsf/ |
| H A D | core-isa.h | 119 #define XCHAL_DCACHE_LINEWIDTH 4 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
| H A D | core.h | 132 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-dsp3400/ |
| H A D | core-isa.h | 159 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-lx106/ |
| H A D | core-isa.h | 152 #define XCHAL_DCACHE_LINEWIDTH 2 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | core-isa.h | 123 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/dc232b/include/variant/ |
| H A D | core.h | 124 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/ |
| H A D | core.h | 122 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | core-isa.h | 162 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/ |
| H A D | core.h | 141 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/dc233c/include/variant/ |
| H A D | core.h | 163 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/ |
| H A D | core-isa.h | 183 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| H A D | core.h | 183 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/de212/include/variant/ |
| H A D | core.h | 211 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/linux/arch/xtensa/variants/csp/include/variant/ |
| H A D | core.h | 211 #define XCHAL_DCACHE_LINEWIDTH 6 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-test_kc705_be/ |
| H A D | core-isa.h | 211 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/u-boot/arch/xtensa/include/asm/arch-de212/ |
| H A D | core.h | 189 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
|
| /openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/ |
| H A D | core.h | 212 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | core-isa.h | 220 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-sample_controller/ |
| H A D | core-isa.h | 234 #define XCHAL_DCACHE_LINEWIDTH 2 /* log2(D line size in bytes) */ macro
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| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | core-isa.h | 283 #define XCHAL_DCACHE_LINEWIDTH 5 /* log2(D line size in bytes) */ macro
|