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Searched defs:CSR_MIDELEG (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h191 #define CSR_MIDELEG 0x303 macro
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h354 #define CSR_MIDELEG global() macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h155 #define CSR_MIDELEG 0x303 macro