Searched defs:CSR_MHPMEVENT15 (Results 1 – 2 of 2) sorted by relevance
/openbmc/u-boot/arch/riscv/include/asm/ | ||
H A D | encoding.h | 207 #define CSR_MHPMEVENT15 0x32f macro |
/openbmc/qemu/target/riscv/ | ||
H A D | cpu_bits.h | 419 #define CSR_MHPMEVENT15 0x32f macro |