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Searched defs:CSR_MCYCLE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h258 #define CSR_MCYCLE 0xb00 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h139 #define CSR_MCYCLE 0xb00 macro