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Searched defs:CSR_HENVCFGH (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h321 #define CSR_HENVCFGH 0x61a macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h251 #define CSR_HENVCFGH 0x61A macro