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Searched defs:CSR_FFLAGS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h171 #define CSR_FFLAGS 0x1 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h53 #define CSR_FFLAGS 0x001 macro