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Searched defs:CONFIG_SYS_DDR_CONTROL (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/include/configs/
H A DBSC9132QDS.h168 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
174 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_1333 macro
180 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
H A DUCP1020.h164 #define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */ macro
166 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
H A DMPC8540ADS.h88 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
H A DMPC8560ADS.h87 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
H A DBSC9131RDB.h96 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
H A Dsbc8548.h121 #define CONFIG_SYS_DDR_CONTROL 0xc300c000 macro
H A Dsbc8349.h99 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
H A Dp1_twr.h95 #define CONFIG_SYS_DDR_CONTROL 0xc70c0000 /* Type = DDR3 */ macro
H A DMPC8349EMDS.h122 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
H A DMPC8569MDS.h110 #define CONFIG_SYS_DDR_CONTROL 0xc7000000 /* Type = DDR3 */ macro
H A DP1022DS.h160 #define CONFIG_SYS_DDR_CONTROL 0xc7000008 macro
H A DMPC8536DS.h117 #define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */ macro
H A DMPC8572DS.h109 #define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ macro
H A DMPC8641HPCN.h139 #define CONFIG_SYS_DDR_CONTROL 0xe3008000 /* Type = DDR2 */ macro
H A DP1010RDB.h237 #define CONFIG_SYS_DDR_CONTROL 0xc70c0008 /* Type = DDR3 */ macro
H A Dp1_p2_rdb_pc.h302 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro