Lines Matching refs:hpipe_addr

91 	void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane);  in comphy_pcie_power_up()  local
172 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_pcie_power_up()
182 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, data, mask); in comphy_pcie_power_up()
198 reg_set(hpipe_addr + HPIPE_CLK_SRC_HI_REG, data, mask); in comphy_pcie_power_up()
200 reg_set(hpipe_addr + HPIPE_LANE_EQ_CFG1_REG, in comphy_pcie_power_up()
204 reg_set(hpipe_addr + HPIPE_DFE_CTRL_28_REG, in comphy_pcie_power_up()
236 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_pcie_power_up()
249 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_pcie_power_up()
255 reg_set(hpipe_addr + HPIPE_LANE_ALIGN_REG, data, mask); in comphy_pcie_power_up()
263 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_pcie_power_up()
277 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, data, mask); in comphy_pcie_power_up()
285 reg_set(hpipe_addr + HPIPE_PCIE_REG0, data, mask); in comphy_pcie_power_up()
296 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
304 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_pcie_power_up()
316 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_11_REG, data, mask); in comphy_pcie_power_up()
330 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_pcie_power_up()
335 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_pcie_power_up()
340 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_4_REG, data, mask); in comphy_pcie_power_up()
346 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_REG, data, mask); in comphy_pcie_power_up()
351 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_pcie_power_up()
356 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_pcie_power_up()
361 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_pcie_power_up()
372 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_pcie_power_up()
377 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_pcie_power_up()
379 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, 0, mask); in comphy_pcie_power_up()
387 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_pcie_power_up()
392 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_pcie_power_up()
401 reg_set(hpipe_addr + HPIPE_CDR_CONTROL_REG, data, mask); in comphy_pcie_power_up()
404 reg_set(hpipe_addr + HPIPE_DFE_CONTROL_REG, data, mask); in comphy_pcie_power_up()
413 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_pcie_power_up()
418 reg_set(hpipe_addr + HPIPE_G2_SETTINGS_4_REG, data, mask); in comphy_pcie_power_up()
423 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_pcie_power_up()
428 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_pcie_power_up()
433 reg_set(hpipe_addr + HPIPE_G3_SETTING_5_REG, data, mask); in comphy_pcie_power_up()
442 reg_set(hpipe_addr + HPIPE_LANE_EQ_REMOTE_SETTING_REG, data, mask); in comphy_pcie_power_up()
448 reg_set(hpipe_addr + HPIPE_LANE_EQU_CONFIG_0_REG, data, mask); in comphy_pcie_power_up()
485 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_pcie_power_up()
509 hpipe_addr + HPIPE_LANE_STATUS1_REG, in comphy_pcie_power_up()
525 void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane); in comphy_usb3_power_up() local
568 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, data, mask); in comphy_usb3_power_up()
570 reg_set(hpipe_addr + HPIPE_CLK_SRC_LO_REG, in comphy_usb3_power_up()
574 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_usb3_power_up()
583 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_usb3_power_up()
585 reg_set(hpipe_addr + HPIPE_GLOBAL_PM_CTRL, in comphy_usb3_power_up()
589 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_usb3_power_up()
593 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_usb3_power_up()
597 reg_set(hpipe_addr + HPIPE_LANE_CONFIG0_REG, in comphy_usb3_power_up()
601 reg_set(hpipe_addr + HPIPE_TST_MODE_CTRL_REG, in comphy_usb3_power_up()
616 reg_set(hpipe_addr + HPIPE_LANE_CFG4_REG, data, mask); in comphy_usb3_power_up()
621 reg_set(hpipe_addr + HPIPE_RST_CLK_CTRL_REG, in comphy_usb3_power_up()
628 addr = hpipe_addr + HPIPE_LANE_STATUS1_REG; in comphy_usb3_power_up()
634 hpipe_addr + HPIPE_LANE_STATUS1_REG, data); in comphy_usb3_power_up()
648 void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane); in comphy_sata_power_up() local
734 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_sata_power_up()
743 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sata_power_up()
745 reg_set(hpipe_addr + HPIPE_INTERFACE_REG, in comphy_sata_power_up()
749 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_sata_power_up()
765 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sata_power_up()
777 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sata_power_up()
790 reg_set(hpipe_addr + HPIPE_G2_SET_1_REG, data, mask); in comphy_sata_power_up()
807 reg_set(hpipe_addr + HPIPE_G3_SET_1_REG, data, mask); in comphy_sata_power_up()
824 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sata_power_up()
829 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
832 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sata_power_up()
837 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sata_power_up()
842 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sata_power_up()
849 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sata_power_up()
862 reg_set(hpipe_addr + HPIPE_G3_SETTING_3_REG, data, mask); in comphy_sata_power_up()
867 reg_set(hpipe_addr + HPIPE_G3_SETTING_4_REG, data, mask); in comphy_sata_power_up()
874 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
877 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
880 reg_set(hpipe_addr + HPIPE_PHASE_CONTROL_REG, data, mask); in comphy_sata_power_up()
891 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sata_power_up()
902 reg_set(hpipe_addr + HPIPE_G2_SET_0_REG, data, mask); in comphy_sata_power_up()
917 reg_set(hpipe_addr + HPIPE_G3_SET_0_REG, data, mask); in comphy_sata_power_up()
925 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
928 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
942 reg_set(hpipe_addr + HPIPE_SYNC_PATTERN_REG, data, mask); in comphy_sata_power_up()
945 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
948 reg_set(hpipe_addr + HPIPE_PWR_CTR_REG, in comphy_sata_power_up()
991 hpipe_addr + HPIPE_LANE_STATUS1_REG, data); in comphy_sata_power_up()
1007 void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane); in comphy_sgmii_power_up() local
1067 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sgmii_power_up()
1073 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sgmii_power_up()
1077 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sgmii_power_up()
1083 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sgmii_power_up()
1087 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sgmii_power_up()
1092 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_sgmii_power_up()
1153 void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane); in comphy_sfi_power_up() local
1210 reg_set(hpipe_addr + HPIPE_MISC_REG, data, mask); in comphy_sfi_power_up()
1216 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_sfi_power_up()
1220 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, data, mask); in comphy_sfi_power_up()
1226 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_sfi_power_up()
1230 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, data, mask); in comphy_sfi_power_up()
1246 reg_set(hpipe_addr + HPIPE_SPD_DIV_FORCE_REG, data, mask); in comphy_sfi_power_up()
1257 reg_set(hpipe_addr + HPIPE_DFE_REG0, data, mask); in comphy_sfi_power_up()
1268 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, data, mask); in comphy_sfi_power_up()
1274 reg_set(hpipe_addr + HPIPE_G1_SET_2_REG, data, mask); in comphy_sfi_power_up()
1280 reg_set(hpipe_addr + HPIPE_TX_REG1_REG, data, mask); in comphy_sfi_power_up()
1286 reg_set(hpipe_addr + HPIPE_CAL_REG1_REG, data, mask); in comphy_sfi_power_up()
1290 reg_set(hpipe_addr + HPIPE_G1_SETTING_5_REG, data, mask); in comphy_sfi_power_up()
1311 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_sfi_power_up()
1318 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_sfi_power_up()
1323 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_sfi_power_up()
1336 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_3_REG, data, mask); in comphy_sfi_power_up()
1341 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_5_REG, data, mask); in comphy_sfi_power_up()
1346 reg_set(hpipe_addr + HPIPE_TX_TRAIN_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1351 reg_set(hpipe_addr + HPIPE_TX_PRESET_INDEX_REG, data, mask); in comphy_sfi_power_up()
1356 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_3_REG, data, mask); in comphy_sfi_power_up()
1363 reg_set(hpipe_addr + HPIPE_TX_TRAIN_REG, data, mask); in comphy_sfi_power_up()
1368 reg_set(hpipe_addr + HPIPE_FRAME_DETECT_CTRL_0_REG, data, mask); in comphy_sfi_power_up()
1373 reg_set(hpipe_addr + HPIPE_DME_REG, data, mask); in comphy_sfi_power_up()
1378 reg_set(hpipe_addr + HPIPE_VDD_CAL_0_REG, data, mask); in comphy_sfi_power_up()
1385 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1388 reg_set(hpipe_addr + HPIPE_SAMPLER_N_PROC_CALIB_CTRL_REG, data, mask); in comphy_sfi_power_up()
1393 reg_set(hpipe_addr + HPIPE_VDD_CAL_CTRL_REG, data, mask); in comphy_sfi_power_up()
1454 void __iomem *hpipe_addr = HPIPE_ADDR(hpipe_base, lane); in comphy_rxauii_power_up() local
1517 reg_set(hpipe_addr + HPIPE_MISC_REG, in comphy_rxauii_power_up()
1525 reg_set(hpipe_addr + HPIPE_PWR_PLL_REG, data, mask); in comphy_rxauii_power_up()
1527 reg_set(hpipe_addr + HPIPE_LOOPBACK_REG, in comphy_rxauii_power_up()
1534 reg_set(hpipe_addr + HPIPE_RX_CONTROL_1_REG, data, mask); in comphy_rxauii_power_up()
1536 reg_set(hpipe_addr + HPIPE_PWR_CTR_DTL_REG, in comphy_rxauii_power_up()
1547 reg_set(hpipe_addr + HPIPE_DFE_REG0, 0x1 << HPIPE_DFE_RES_FORCE_OFFSET, in comphy_rxauii_power_up()
1550 reg_set(hpipe_addr + HPIPE_G1_SET_0_REG, in comphy_rxauii_power_up()
1560 reg_set(hpipe_addr + HPIPE_G1_SET_1_REG, data, mask); in comphy_rxauii_power_up()
1566 reg_set(hpipe_addr + HPIPE_DFE_F3_F5_REG, data, mask); in comphy_rxauii_power_up()
1571 reg_set(hpipe_addr + HPIPE_G1_SETTINGS_4_REG, data, mask); in comphy_rxauii_power_up()