Lines Matching +full:fw +full:- +full:cfg +full:- +full:mmio
2 * QEMU RISC-V VirtIO Board
6 * RISC-V machine with 16550a UART and VirtIO MMIO
23 #include "qemu/error-report.h"
24 #include "qemu/guest-random.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/char/serial-mm.h"
32 #include "hw/core/sysbus-fdt.h"
36 #include "hw/riscv/riscv-iommu-bits.h"
46 #include "hw/platform-bus.h"
55 #include "hw/pci-host/gpex.h"
57 #include "hw/acpi/aml-build.h"
58 #include "qapi/qapi-visit-common.h"
59 #include "hw/virtio/virtio-iommu.h"
60 #include "hw/uefi/var-service-api.h"
106 /* PCIe high mmio is fixed for RV32 */
110 /* PCIe high mmio for RV64, size is fixed but base depends on top of RAM */
127 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE); in virt_flash_create1()
129 qdev_prop_set_uint8(dev, "device-width", 2); in virt_flash_create1()
130 qdev_prop_set_bit(dev, "big-endian", false); in virt_flash_create1()
146 s->flash[0] = virt_flash_create1(s, "virt.flash0", "pflash0"); in virt_flash_create()
147 s->flash[1] = virt_flash_create1(s, "virt.flash1", "pflash1"); in virt_flash_create()
158 qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE); in virt_flash_map1()
172 virt_flash_map1(s->flash[0], flashbase, flashsize, in virt_flash_map()
174 virt_flash_map1(s->flash[1], flashbase + flashsize, flashsize, in virt_flash_map()
192 * possible slot) seeing the interrupt-map-mask will allow the table in create_pcie_irq_map()
213 if (s->aia_type != VIRT_AIA_TYPE_NONE) { in create_pcie_irq_map()
224 qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map, in create_pcie_irq_map()
228 qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask", in create_pcie_irq_map()
239 bool is_32_bit = riscv_is_32bit(&s->soc[0]); in create_fdt_socket_cpus()
242 for (cpu = s->soc[socket].num_harts - 1; cpu >= 0; cpu--) { in create_fdt_socket_cpus()
243 RISCVCPU *cpu_ptr = &s->soc[socket].harts[cpu]; in create_fdt_socket_cpus()
252 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
253 qemu_fdt_add_subnode(ms->fdt, cpu_name); in create_fdt_socket_cpus()
255 if (cpu_ptr->cfg.satp_mode.supported != 0) { in create_fdt_socket_cpus()
256 satp_mode_max = satp_mode_max_from_map(cpu_ptr->cfg.satp_mode.map); in create_fdt_socket_cpus()
259 qemu_fdt_setprop_string(ms->fdt, cpu_name, "mmu-type", sv_name); in create_fdt_socket_cpus()
262 riscv_isa_write_fdt(cpu_ptr, ms->fdt, cpu_name); in create_fdt_socket_cpus()
264 if (cpu_ptr->cfg.ext_zicbom) { in create_fdt_socket_cpus()
265 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbom-block-size", in create_fdt_socket_cpus()
266 cpu_ptr->cfg.cbom_blocksize); in create_fdt_socket_cpus()
269 if (cpu_ptr->cfg.ext_zicboz) { in create_fdt_socket_cpus()
270 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cboz-block-size", in create_fdt_socket_cpus()
271 cpu_ptr->cfg.cboz_blocksize); in create_fdt_socket_cpus()
274 if (cpu_ptr->cfg.ext_zicbop) { in create_fdt_socket_cpus()
275 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "riscv,cbop-block-size", in create_fdt_socket_cpus()
276 cpu_ptr->cfg.cbop_blocksize); in create_fdt_socket_cpus()
279 qemu_fdt_setprop_string(ms->fdt, cpu_name, "compatible", "riscv"); in create_fdt_socket_cpus()
280 qemu_fdt_setprop_string(ms->fdt, cpu_name, "status", "okay"); in create_fdt_socket_cpus()
281 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "reg", in create_fdt_socket_cpus()
282 s->soc[socket].hartid_base + cpu); in create_fdt_socket_cpus()
283 qemu_fdt_setprop_string(ms->fdt, cpu_name, "device_type", "cpu"); in create_fdt_socket_cpus()
285 qemu_fdt_setprop_cell(ms->fdt, cpu_name, "phandle", cpu_phandle); in create_fdt_socket_cpus()
289 intc_name = g_strdup_printf("%s/interrupt-controller", cpu_name); in create_fdt_socket_cpus()
290 qemu_fdt_add_subnode(ms->fdt, intc_name); in create_fdt_socket_cpus()
291 qemu_fdt_setprop_cell(ms->fdt, intc_name, "phandle", in create_fdt_socket_cpus()
293 qemu_fdt_setprop_string(ms->fdt, intc_name, "compatible", in create_fdt_socket_cpus()
294 "riscv,cpu-intc"); in create_fdt_socket_cpus()
295 qemu_fdt_setprop(ms->fdt, intc_name, "interrupt-controller", NULL, 0); in create_fdt_socket_cpus()
296 qemu_fdt_setprop_cell(ms->fdt, intc_name, "#interrupt-cells", 1); in create_fdt_socket_cpus()
299 qemu_fdt_add_subnode(ms->fdt, core_name); in create_fdt_socket_cpus()
300 qemu_fdt_setprop_cell(ms->fdt, core_name, "cpu", cpu_phandle); in create_fdt_socket_cpus()
314 qemu_fdt_add_subnode(ms->fdt, mem_name); in create_fdt_socket_memory()
315 qemu_fdt_setprop_cells(ms->fdt, mem_name, "reg", in create_fdt_socket_memory()
317 qemu_fdt_setprop_string(ms->fdt, mem_name, "device_type", "memory"); in create_fdt_socket_memory()
334 clint_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_clint()
336 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_clint()
345 qemu_fdt_add_subnode(ms->fdt, clint_name); in create_fdt_socket_clint()
346 qemu_fdt_setprop_string_array(ms->fdt, clint_name, "compatible", in create_fdt_socket_clint()
349 qemu_fdt_setprop_cells(ms->fdt, clint_name, "reg", in create_fdt_socket_clint()
351 qemu_fdt_setprop(ms->fdt, clint_name, "interrupts-extended", in create_fdt_socket_clint()
352 clint_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_clint()
369 aclint_mswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
370 aclint_mtimer_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
371 aclint_sswi_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_aclint()
373 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_aclint()
381 aclint_cells_size = s->soc[socket].num_harts * sizeof(uint32_t) * 2; in create_fdt_socket_aclint()
383 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
386 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
387 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
388 "riscv,aclint-mswi"); in create_fdt_socket_aclint()
389 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
391 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
393 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
394 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
399 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
406 size = memmap[VIRT_CLINT].size - RISCV_ACLINT_SWI_SIZE; in create_fdt_socket_aclint()
409 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
410 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
411 "riscv,aclint-mtimer"); in create_fdt_socket_aclint()
412 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
414 0x0, size - RISCV_ACLINT_DEFAULT_MTIME, in create_fdt_socket_aclint()
417 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
422 if (s->aia_type != VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_socket_aclint()
426 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_socket_aclint()
427 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_socket_aclint()
428 "riscv,aclint-sswi"); in create_fdt_socket_aclint()
429 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_socket_aclint()
431 qemu_fdt_setprop(ms->fdt, name, "interrupts-extended", in create_fdt_socket_aclint()
433 qemu_fdt_setprop(ms->fdt, name, "interrupt-controller", NULL, 0); in create_fdt_socket_aclint()
434 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", 0); in create_fdt_socket_aclint()
451 "sifive,plic-1.0.0", "riscv,plic0" in create_fdt_socket_plic()
457 qemu_fdt_add_subnode(ms->fdt, plic_name); in create_fdt_socket_plic()
458 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
459 "#interrupt-cells", FDT_PLIC_INT_CELLS); in create_fdt_socket_plic()
460 qemu_fdt_setprop_cell(ms->fdt, plic_name, in create_fdt_socket_plic()
461 "#address-cells", FDT_PLIC_ADDR_CELLS); in create_fdt_socket_plic()
462 qemu_fdt_setprop_string_array(ms->fdt, plic_name, "compatible", in create_fdt_socket_plic()
465 qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0); in create_fdt_socket_plic()
468 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2); in create_fdt_socket_plic()
470 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
475 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
477 s->soc[socket].num_harts * sizeof(uint32_t) * 2); in create_fdt_socket_plic()
479 plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4); in create_fdt_socket_plic()
481 for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) { in create_fdt_socket_plic()
488 qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended", in create_fdt_socket_plic()
490 s->soc[socket].num_harts * sizeof(uint32_t) * 4); in create_fdt_socket_plic()
493 qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg", in create_fdt_socket_plic()
495 qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev", in create_fdt_socket_plic()
496 VIRT_IRQCHIP_NUM_SOURCES - 1); in create_fdt_socket_plic()
498 qemu_fdt_setprop_cell(ms->fdt, plic_name, "phandle", in create_fdt_socket_plic()
502 platform_bus_add_all_fdt_nodes(ms->fdt, plic_name, in create_fdt_socket_plic()
535 imsic_cells = g_new0(uint32_t, ms->smp.cpus * 2); in create_fdt_one_imsic()
538 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in create_fdt_one_imsic()
547 s->soc[socket].num_harts; in create_fdt_one_imsic()
552 if (imsic_max_hart_per_socket < s->soc[socket].num_harts) { in create_fdt_one_imsic()
553 imsic_max_hart_per_socket = s->soc[socket].num_harts; in create_fdt_one_imsic()
557 imsic_name = g_strdup_printf("/soc/interrupt-controller@%lx", in create_fdt_one_imsic()
559 qemu_fdt_add_subnode(ms->fdt, imsic_name); in create_fdt_one_imsic()
560 qemu_fdt_setprop_string_array(ms->fdt, imsic_name, "compatible", in create_fdt_one_imsic()
564 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "#interrupt-cells", in create_fdt_one_imsic()
566 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupt-controller", NULL, 0); in create_fdt_one_imsic()
567 qemu_fdt_setprop(ms->fdt, imsic_name, "msi-controller", NULL, 0); in create_fdt_one_imsic()
568 qemu_fdt_setprop(ms->fdt, imsic_name, "interrupts-extended", in create_fdt_one_imsic()
569 imsic_cells, ms->smp.cpus * sizeof(uint32_t) * 2); in create_fdt_one_imsic()
570 qemu_fdt_setprop(ms->fdt, imsic_name, "reg", imsic_regs, in create_fdt_one_imsic()
572 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,num-ids", in create_fdt_one_imsic()
576 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,guest-index-bits", in create_fdt_one_imsic()
581 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,hart-index-bits", in create_fdt_one_imsic()
583 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-bits", in create_fdt_one_imsic()
585 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "riscv,group-index-shift", in create_fdt_one_imsic()
588 qemu_fdt_setprop_cell(ms->fdt, imsic_name, "phandle", msi_phandle); in create_fdt_one_imsic()
599 /* M-level IMSIC node */ in create_fdt_imsic()
604 /* S-level IMSIC node */ in create_fdt_imsic()
607 imsic_num_bits(s->aia_guests + 1)); in create_fdt_imsic()
614 return g_strdup_printf("/soc/interrupt-controller@%lx", aplic_addr); in fdt_get_aplic_nodename()
638 qemu_fdt_add_subnode(ms->fdt, aplic_name); in create_fdt_one_aplic()
639 qemu_fdt_setprop_string_array(ms->fdt, aplic_name, "compatible", in create_fdt_one_aplic()
642 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "#address-cells", in create_fdt_one_aplic()
644 qemu_fdt_setprop_cell(ms->fdt, aplic_name, in create_fdt_one_aplic()
645 "#interrupt-cells", FDT_APLIC_INT_CELLS); in create_fdt_one_aplic()
646 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupt-controller", NULL, 0); in create_fdt_one_aplic()
648 if (s->aia_type == VIRT_AIA_TYPE_APLIC) { in create_fdt_one_aplic()
649 qemu_fdt_setprop(ms->fdt, aplic_name, "interrupts-extended", in create_fdt_one_aplic()
652 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "msi-parent", msi_phandle); in create_fdt_one_aplic()
655 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "reg", in create_fdt_one_aplic()
657 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,num-sources", in create_fdt_one_aplic()
661 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "riscv,children", in create_fdt_one_aplic()
663 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegation", in create_fdt_one_aplic()
672 qemu_fdt_setprop_cells(ms->fdt, aplic_name, "riscv,delegate", in create_fdt_one_aplic()
678 qemu_fdt_setprop_cell(ms->fdt, aplic_name, "phandle", aplic_phandle); in create_fdt_one_aplic()
698 /* M-level APLIC node */ in create_fdt_socket_aplic()
707 /* S-level APLIC node */ in create_fdt_socket_aplic()
717 platform_bus_add_all_fdt_nodes(ms->fdt, aplic_name, in create_fdt_socket_aplic()
730 RISCVCPU hart = s->soc[0].harts[0]; in create_fdt_pmu()
732 qemu_fdt_add_subnode(ms->fdt, pmu_name); in create_fdt_pmu()
733 qemu_fdt_setprop_string(ms->fdt, pmu_name, "compatible", "riscv,pmu"); in create_fdt_pmu()
734 riscv_pmu_generate_fdt_node(ms->fdt, hart.pmu_avail_ctrs, pmu_name); in create_fdt_pmu()
751 qemu_fdt_add_subnode(ms->fdt, "/cpus"); in create_fdt_sockets()
752 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency", in create_fdt_sockets()
754 kvm_riscv_get_timebase_frequency(&s->soc->harts[0]) : in create_fdt_sockets()
756 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); in create_fdt_sockets()
757 qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1); in create_fdt_sockets()
758 qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); in create_fdt_sockets()
760 intc_phandles = g_new0(uint32_t, ms->smp.cpus); in create_fdt_sockets()
762 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
763 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
765 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
767 clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", socket); in create_fdt_sockets()
768 qemu_fdt_add_subnode(ms->fdt, clust_name); in create_fdt_sockets()
775 if (virt_aclint_allowed() && s->have_aclint) { in create_fdt_sockets()
784 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_sockets()
791 * With KVM AIA aplic-imsic, using an irqchip without split in create_fdt_sockets()
794 if (!virt_use_emulated_aplic(s->aia_type)) { in create_fdt_sockets()
798 ms->smp.cpus); in create_fdt_sockets()
804 phandle_pos = ms->smp.cpus; in create_fdt_sockets()
805 for (socket = (socket_count - 1); socket >= 0; socket--) { in create_fdt_sockets()
806 phandle_pos -= s->soc[socket].num_harts; in create_fdt_sockets()
808 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_sockets()
817 s->soc[socket].num_harts); in create_fdt_sockets()
850 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_virtio()
851 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "virtio,mmio"); in create_fdt_virtio()
852 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_virtio()
855 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_virtio()
857 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_virtio()
858 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", in create_fdt_virtio()
861 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", in create_fdt_virtio()
877 qemu_fdt_setprop_cell(ms->fdt, name, "#address-cells", in create_fdt_pcie()
879 qemu_fdt_setprop_cell(ms->fdt, name, "#interrupt-cells", in create_fdt_pcie()
881 qemu_fdt_setprop_cell(ms->fdt, name, "#size-cells", 0x2); in create_fdt_pcie()
882 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_pcie()
883 "pci-host-ecam-generic"); in create_fdt_pcie()
884 qemu_fdt_setprop_string(ms->fdt, name, "device_type", "pci"); in create_fdt_pcie()
885 qemu_fdt_setprop_cell(ms->fdt, name, "linux,pci-domain", 0); in create_fdt_pcie()
886 qemu_fdt_setprop_cells(ms->fdt, name, "bus-range", 0, in create_fdt_pcie()
887 memmap[VIRT_PCIE_ECAM].size / PCIE_MMCFG_SIZE_MIN - 1); in create_fdt_pcie()
888 qemu_fdt_setprop(ms->fdt, name, "dma-coherent", NULL, 0); in create_fdt_pcie()
889 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in create_fdt_pcie()
890 qemu_fdt_setprop_cell(ms->fdt, name, "msi-parent", msi_pcie_phandle); in create_fdt_pcie()
892 qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0, in create_fdt_pcie()
894 qemu_fdt_setprop_sized_cells(ms->fdt, name, "ranges", in create_fdt_pcie()
905 qemu_fdt_setprop_cells(ms->fdt, name, "iommu-map", in create_fdt_pcie()
910 create_pcie_irq_map(s, ms->fdt, name, irq_pcie_phandle); in create_fdt_pcie()
923 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
928 qemu_fdt_setprop_string_array(ms->fdt, name, "compatible", in create_fdt_reset()
931 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_reset()
933 qemu_fdt_setprop_cell(ms->fdt, name, "phandle", test_phandle); in create_fdt_reset()
934 test_phandle = qemu_fdt_get_phandle(ms->fdt, name); in create_fdt_reset()
938 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
939 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot"); in create_fdt_reset()
940 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
941 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
942 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_RESET); in create_fdt_reset()
946 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_reset()
947 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff"); in create_fdt_reset()
948 qemu_fdt_setprop_cell(ms->fdt, name, "regmap", test_phandle); in create_fdt_reset()
949 qemu_fdt_setprop_cell(ms->fdt, name, "offset", 0x0); in create_fdt_reset()
950 qemu_fdt_setprop_cell(ms->fdt, name, "value", FINISHER_PASS); in create_fdt_reset()
961 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_uart()
962 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "ns16550a"); in create_fdt_uart()
963 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_uart()
966 qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400); in create_fdt_uart()
967 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle); in create_fdt_uart()
968 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_uart()
969 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ); in create_fdt_uart()
971 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4); in create_fdt_uart()
974 qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name); in create_fdt_uart()
975 qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", name); in create_fdt_uart()
985 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_rtc()
986 qemu_fdt_setprop_string(ms->fdt, name, "compatible", in create_fdt_rtc()
987 "google,goldfish-rtc"); in create_fdt_rtc()
988 qemu_fdt_setprop_cells(ms->fdt, name, "reg", in create_fdt_rtc()
990 qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", in create_fdt_rtc()
992 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in create_fdt_rtc()
993 qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ); in create_fdt_rtc()
995 qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4); in create_fdt_rtc()
1006 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt_flash()
1007 qemu_fdt_setprop_string(ms->fdt, name, "compatible", "cfi-flash"); in create_fdt_flash()
1008 qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg", in create_fdt_flash()
1011 qemu_fdt_setprop_cell(ms->fdt, name, "bank-width", 4); in create_fdt_flash()
1019 g_autofree char *nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base); in create_fdt_fw_cfg()
1021 qemu_fdt_add_subnode(ms->fdt, nodename); in create_fdt_fw_cfg()
1022 qemu_fdt_setprop_string(ms->fdt, nodename, in create_fdt_fw_cfg()
1023 "compatible", "qemu,fw-cfg-mmio"); in create_fdt_fw_cfg()
1024 qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", in create_fdt_fw_cfg()
1026 qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); in create_fdt_fw_cfg()
1031 const char compat[] = "virtio,pci-iommu\0pci1af4,1057"; in create_fdt_virtio_iommu()
1032 void *fdt = MACHINE(s)->fdt; in create_fdt_virtio_iommu()
1049 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_virtio_iommu()
1052 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_virtio_iommu()
1054 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_virtio_iommu()
1062 void *fdt = MACHINE(s)->fdt; in create_fdt_iommu_sys()
1065 hwaddr addr = s->memmap[VIRT_IOMMU_SYS].base; in create_fdt_iommu_sys()
1066 hwaddr size = s->memmap[VIRT_IOMMU_SYS].size; in create_fdt_iommu_sys()
1075 (unsigned int) s->memmap[VIRT_IOMMU_SYS].base); in create_fdt_iommu_sys()
1080 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_iommu_sys()
1085 qemu_fdt_setprop_cell(fdt, iommu_node, "interrupt-parent", irq_chip); in create_fdt_iommu_sys()
1093 qemu_fdt_setprop_cell(fdt, iommu_node, "msi-parent", msi_phandle); in create_fdt_iommu_sys()
1100 const char comp[] = "riscv,pci-iommu"; in create_fdt_iommu()
1101 void *fdt = MACHINE(s)->fdt; in create_fdt_iommu()
1113 qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); in create_fdt_iommu()
1117 qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", in create_fdt_iommu()
1119 bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); in create_fdt_iommu()
1154 ms->fdt = create_device_tree(&s->fdt_size); in create_fdt()
1155 if (!ms->fdt) { in create_fdt()
1160 qemu_fdt_setprop_string(ms->fdt, "/", "model", "riscv-virtio,qemu"); in create_fdt()
1161 qemu_fdt_setprop_string(ms->fdt, "/", "compatible", "riscv-virtio"); in create_fdt()
1162 qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2); in create_fdt()
1163 qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2); in create_fdt()
1165 qemu_fdt_add_subnode(ms->fdt, "/soc"); in create_fdt()
1166 qemu_fdt_setprop(ms->fdt, "/soc", "ranges", NULL, 0); in create_fdt()
1167 qemu_fdt_setprop_string(ms->fdt, "/soc", "compatible", "simple-bus"); in create_fdt()
1168 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#size-cells", 0x2); in create_fdt()
1169 qemu_fdt_setprop_cell(ms->fdt, "/soc", "#address-cells", 0x2); in create_fdt()
1176 qemu_fdt_add_subnode(ms->fdt, name); in create_fdt()
1178 qemu_fdt_add_subnode(ms->fdt, "/chosen"); in create_fdt()
1182 qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed", in create_fdt()
1185 qemu_fdt_add_subnode(ms->fdt, "/aliases"); in create_fdt()
1199 hwaddr ecam_base = s->memmap[VIRT_PCIE_ECAM].base; in gpex_pcie_init()
1200 hwaddr ecam_size = s->memmap[VIRT_PCIE_ECAM].size; in gpex_pcie_init()
1201 hwaddr mmio_base = s->memmap[VIRT_PCIE_MMIO].base; in gpex_pcie_init()
1202 hwaddr mmio_size = s->memmap[VIRT_PCIE_MMIO].size; in gpex_pcie_init()
1205 hwaddr pio_base = s->memmap[VIRT_PCIE_PIO].base; in gpex_pcie_init()
1206 hwaddr pio_size = s->memmap[VIRT_PCIE_PIO].size; in gpex_pcie_init()
1234 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", in gpex_pcie_init()
1240 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", in gpex_pcie_init()
1244 /* Map high MMIO space */ in gpex_pcie_init()
1246 memory_region_init_alias(high_mmio_alias, OBJECT(dev), "pcie-mmio-high", in gpex_pcie_init()
1260 GPEX_HOST(dev)->gpex_cfg.bus = PCI_HOST_BRIDGE(dev)->bus; in gpex_pcie_init()
1271 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); in create_fw_cfg()
1282 /* Per-socket PLIC hart topology configuration string */ in virt_create_plic()
1285 /* Per-socket PLIC */ in virt_create_plic()
1290 ((1U << VIRT_IRQCHIP_NUM_PRIO_BITS) - 1), in virt_create_plic()
1315 /* Per-socket M-level IMSICs */ in virt_create_aia()
1325 /* Per-socket S-level IMSICs */ in virt_create_aia()
1336 /* Per-socket M-level APLIC */ in virt_create_aia()
1347 /* Per-socket S-level APLIC */ in virt_create_aia()
1373 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); in create_platform_bus()
1377 s->platform_bus_dev = dev; in create_platform_bus()
1403 smbios_set_defaults("QEMU", product, mc->name); in virt_build_smbios()
1405 if (riscv_is_32bit(&s->soc[0])) { in virt_build_smbios()
1412 mem_array.address = s->memmap[VIRT_DRAM].base; in virt_build_smbios()
1413 mem_array.length = ms->ram_size; in virt_build_smbios()
1422 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-tables", in virt_build_smbios()
1424 fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-anchor", in virt_build_smbios()
1437 const char *firmware_name = riscv_default_firmware_name(&s->soc[0]); in virt_machine_done()
1447 if (machine->dtb == NULL) { in virt_machine_done()
1453 * so the "-bios" parameter is not supported when KVM is enabled. in virt_machine_done()
1456 if (machine->firmware) { in virt_machine_done()
1457 if (strcmp(machine->firmware, "none")) { in virt_machine_done()
1463 machine->firmware = g_strdup("none"); in virt_machine_done()
1470 pflash_blk0 = pflash_cfi01_get_blk(s->flash[0]); in virt_machine_done()
1472 if (machine->firmware && !strcmp(machine->firmware, "none") && in virt_machine_done()
1483 * In this case, base of the flash would contain S-mode payload. in virt_machine_done()
1490 riscv_boot_info_init(&boot_info, &s->soc[0]); in virt_machine_done()
1492 if (machine->kernel_filename && !kernel_entry) { in virt_machine_done()
1503 riscv_load_fdt(fdt_load_addr, machine->fdt); in virt_machine_done()
1506 riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, in virt_machine_done()
1544 if (!virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1571 object_initialize_child(OBJECT(machine), soc_name, &s->soc[i], in virt_machine_init()
1573 object_property_set_str(OBJECT(&s->soc[i]), "cpu-type", in virt_machine_init()
1574 machine->cpu_type, &error_abort); in virt_machine_init()
1575 object_property_set_int(OBJECT(&s->soc[i]), "hartid-base", in virt_machine_init()
1577 object_property_set_int(OBJECT(&s->soc[i]), "num-harts", in virt_machine_init()
1579 sysbus_realize(SYS_BUS_DEVICE(&s->soc[i]), &error_fatal); in virt_machine_init()
1581 if (virt_aclint_allowed() && s->have_aclint) { in virt_machine_init()
1582 if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) { in virt_machine_init()
1583 /* Per-socket ACLINT MTIMER */ in virt_machine_init()
1592 /* Per-socket ACLINT MSWI, MTIMER, and SSWI */ in virt_machine_init()
1609 /* Per-socket SiFive CLINT */ in virt_machine_init()
1620 /* Per-socket interrupt controller */ in virt_machine_init()
1621 if (s->aia_type == VIRT_AIA_TYPE_NONE) { in virt_machine_init()
1622 s->irqchip[i] = virt_create_plic(memmap, i, in virt_machine_init()
1625 s->irqchip[i] = virt_create_aia(s->aia_type, s->aia_guests, in virt_machine_init()
1632 mmio_irqchip = s->irqchip[i]; in virt_machine_init()
1633 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1634 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1637 virtio_irqchip = s->irqchip[i]; in virt_machine_init()
1638 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1641 pcie_irqchip = s->irqchip[i]; in virt_machine_init()
1645 if (kvm_enabled() && virt_use_kvm_aia_aplic_imsic(s->aia_type)) { in virt_machine_init()
1650 s->aia_guests); in virt_machine_init()
1653 if (riscv_is_32bit(&s->soc[0])) { in virt_machine_init()
1655 /* limit RAM size in a 32-bit system */ in virt_machine_init()
1656 if (machine->ram_size > 10 * GiB) { in virt_machine_init()
1657 machine->ram_size = 10 * GiB; in virt_machine_init()
1665 virt_high_pcie_memmap.base = memmap[VIRT_DRAM].base + machine->ram_size; in virt_machine_init()
1670 s->memmap = virt_memmap; in virt_machine_init()
1674 machine->ram); in virt_machine_init()
1686 s->fw_cfg = create_fw_cfg(machine); in virt_machine_init()
1687 rom_set_fw(s->fw_cfg); in virt_machine_init()
1689 /* SiFive Test MMIO device */ in virt_machine_init()
1692 /* VirtIO MMIO devices */ in virt_machine_init()
1694 sysbus_create_simple("virtio-mmio", in virt_machine_init()
1710 for (i = 0; i < ARRAY_SIZE(s->flash); i++) { in virt_machine_init()
1711 /* Map legacy -drive if=pflash to machine properties */ in virt_machine_init()
1712 pflash_cfi01_legacy_drive(s->flash[i], in virt_machine_init()
1718 if (machine->dtb) { in virt_machine_init()
1719 machine->fdt = load_device_tree(machine->dtb, &s->fdt_size); in virt_machine_init()
1720 if (!machine->fdt) { in virt_machine_init()
1732 s->memmap[VIRT_IOMMU_SYS].base, in virt_machine_init()
1734 object_property_set_uint(OBJECT(iommu_sys), "base-irq", in virt_machine_init()
1744 s->machine_done.notify = virt_machine_done; in virt_machine_init()
1745 qemu_add_machine_init_done_notifier(&s->machine_done); in virt_machine_init()
1754 s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); in virt_machine_instance_init()
1755 s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); in virt_machine_instance_init()
1756 s->acpi = ON_OFF_AUTO_AUTO; in virt_machine_instance_init()
1757 s->iommu_sys = ON_OFF_AUTO_AUTO; in virt_machine_instance_init()
1764 return g_strdup_printf("%d", s->aia_guests); in virt_get_aia_guests()
1771 s->aia_guests = atoi(val); in virt_set_aia_guests()
1772 if (s->aia_guests < 0 || s->aia_guests > VIRT_IRQCHIP_MAX_GUESTS) { in virt_set_aia_guests()
1784 switch (s->aia_type) { in virt_get_aia()
1789 val = "aplic-imsic"; in virt_get_aia()
1804 s->aia_type = VIRT_AIA_TYPE_NONE; in virt_set_aia()
1806 s->aia_type = VIRT_AIA_TYPE_APLIC; in virt_set_aia()
1807 } else if (!strcmp(val, "aplic-imsic")) { in virt_set_aia()
1808 s->aia_type = VIRT_AIA_TYPE_APLIC_IMSIC; in virt_set_aia()
1812 "aplic-imsic.\n"); in virt_set_aia()
1820 return s->have_aclint; in virt_get_aclint()
1827 s->have_aclint = value; in virt_set_aclint()
1832 return s->iommu_sys == ON_OFF_AUTO_ON; in virt_is_iommu_sys_enabled()
1839 OnOffAuto iommu_sys = s->iommu_sys; in virt_get_iommu_sys()
1849 visit_type_OnOffAuto(v, name, &s->iommu_sys, errp); in virt_set_iommu_sys()
1854 return s->acpi != ON_OFF_AUTO_OFF; in virt_is_acpi_enabled()
1861 OnOffAuto acpi = s->acpi; in virt_get_acpi()
1871 visit_type_OnOffAuto(v, name, &s->acpi, errp); in virt_set_acpi()
1883 s->iommu_sys = ON_OFF_AUTO_OFF; in virt_machine_get_hotplug_handler()
1895 if (s->platform_bus_dev) { in virt_machine_device_plug_cb()
1899 platform_bus_link_device(PLATFORM_BUS_DEVICE(s->platform_bus_dev), in virt_machine_device_plug_cb()
1910 s->iommu_sys = ON_OFF_AUTO_OFF; in virt_machine_device_plug_cb()
1919 mc->desc = "RISC-V VirtIO board"; in virt_machine_class_init()
1920 mc->init = virt_machine_init; in virt_machine_class_init()
1921 mc->max_cpus = VIRT_CPUS_MAX; in virt_machine_class_init()
1922 mc->default_cpu_type = TYPE_RISCV_CPU_BASE; in virt_machine_class_init()
1923 mc->block_default_type = IF_VIRTIO; in virt_machine_class_init()
1924 mc->no_cdrom = 1; in virt_machine_class_init()
1925 mc->pci_allow_0_address = true; in virt_machine_class_init()
1926 mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; in virt_machine_class_init()
1927 mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; in virt_machine_class_init()
1928 mc->get_default_cpu_node_id = riscv_numa_get_default_cpu_node_id; in virt_machine_class_init()
1929 mc->numa_mem_supported = true; in virt_machine_class_init()
1931 mc->cpu_cluster_has_numa_boundary = true; in virt_machine_class_init()
1932 mc->default_ram_id = "riscv_virt_board.ram"; in virt_machine_class_init()
1933 assert(!mc->get_hotplug_handler); in virt_machine_class_init()
1934 mc->get_hotplug_handler = virt_machine_get_hotplug_handler; in virt_machine_class_init()
1936 hc->plug = virt_machine_device_plug_cb; in virt_machine_class_init()
1956 "none, aplic, and aplic-imsic."); in virt_machine_class_init()
1958 object_class_property_add_str(oc, "aia-guests", in virt_machine_class_init()
1963 g_strdup_printf("Set number of guest MMIO pages for AIA IMSIC. " in virt_machine_class_init()
1966 object_class_property_set_description(oc, "aia-guests", str); in virt_machine_class_init()
1975 object_class_property_add(oc, "iommu-sys", "OnOffAuto", in virt_machine_class_init()
1978 object_class_property_set_description(oc, "iommu-sys", in virt_machine_class_init()