SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-rockchip

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixe

Merge git://git.denx.de/u-boot-rockchip

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixes and a few other things.

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rockchip: mkimage: force 2KB alignment for init_size

The Rockchip BootROM relies on init_size being aligned to 2KB
(see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).

This pads the i

rockchip: mkimage: force 2KB alignment for init_size

The Rockchip BootROM relies on init_size being aligned to 2KB
(see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).

This pads the image to 2KB both for SD card images and SPI images
and uses a common symbolic constant for the alignment.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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rockchip: mkimage: add support for verify_header/print_header

The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having

rockchip: mkimage: add support for verify_header/print_header

The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having
to resort to hexdump or od. Experience in our testing has showed it
to be very easy to get the rkspi and rksd images mixed up and the
lab... so we add the necessary support to have dumpimage tell us
what image type we're dealing with.

This change set adds the verify_header and print_header capability
to the rksd/rkspi image drivers (through shared code in rkcommon).

As of now, we only support images fully that are not RC4-encoded for
the SPL payload (i.e. header1 and payload). For RC4-encoded payloads,
the outer header (header0) is checked, but no detection of whether
this is a SD/MMC or SPI formatted payload takes place.

The output of dumpsys now prints the image type (spl_hdr), whether it
is a SD/MMC or SPI image, and the (padded) size of the image:
$ ./tools/dumpimage -l ./spl.img
Image Type: Rockchip RK33 (SD/MMC) boot image
^^^^^^ SD/MMC vs. SPI indication
^^^^ spl_hdr indicated by the image
Data Size: 79872 bytes

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Merge git://git.denx.de/u-boot-rockchip

This adds a new firefly-rk3399 board, MIPI support for rk3399 and
rk3288, rk818 pmic support, mkimage improvements for rockchip and a few
other things.

rockchip: mkimage: rksd: pad SD/MMC images to a full blocksize

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>

rockchip: mkimage: rewrite padding calculation for SD/MMC and SPI images

In (first) breaking and (then) fixing the rkspi tool, I realised that
the calculation of the required padding (for the header

rockchip: mkimage: rewrite padding calculation for SD/MMC and SPI images

In (first) breaking and (then) fixing the rkspi tool, I realised that
the calculation of the required padding (for the header-size and the
2K-in-every-4K SPI layout) was not as self-explainatory as it could
have been. This change rewrites the code (using new, common functions
in rkcommon.c) and adds verbose in-line comments to ensure that we
won't fall into the same pit in the future...

Tested on the RK3399 (with has a boot0-style payload) with SD/MMC and SPI.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399

The RK3399 boot code (running as AArch64) poses a bit of a challenge
for SPL image generation:
* The BootROM will start execu

rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399

The RK3399 boot code (running as AArch64) poses a bit of a challenge
for SPL image generation:
* The BootROM will start execution right after the 4-byte header (at
the odd instruction word loaded into SRAM at 0xff8c2004, with the
'RK33' boot magic residing at 0xff8c2000).
* The default padding (during ELF generation) for AArch64 is 0x0,
which is an illegal instruction and the .text section needs to be
naturally aligned (someone might locate a 64bit constant relative
to the section start and unaligned loads trigger a fault for all
privileged modes of an ARMv8)... so we can't simply define the
CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004).
* Finally, we don't want to change the values used for padding of
the SPL .text section for all ARMv8 targets to the instruction
word encoding 'nop', as this would affect all padding in this
section and might hide errors that would otherwise quickly trigger
an illegal insn exception.

To deal with this situation, we modify the rkimage generation to
- understand the fact that the RK3399 needs to pad the header to an
8 byte boundary using an AArch64 'nop'
- the necessary logic to adjust the header_size (which controls the
location where the payload is copied into the image) and to insert
this padding (AArch64 insn words are always little-endian) into
the image following the 4-byte header magic.

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>

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rockchip: mkimage: simplify start/size calculation for rc4_encode

The RC4 encoding works on full blocks, but the calculation of the
starting offset and size are needlessly complicated by using a
ref

rockchip: mkimage: simplify start/size calculation for rc4_encode

The RC4 encoding works on full blocks, but the calculation of the
starting offset and size are needlessly complicated by using a
reference value known to be offset into a block by the size of the
header and then correcting for the (hard-coded) size of the header
(i.e. 4 bytes).

We change this over to use the RK_SPL_HDR_START directly (which is
known to be on a block boundary).

X-AffectedPlatforms: RK3399-Q7
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>

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Merge git://git.denx.de/u-boot-rockchip

This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it bo

Merge git://git.denx.de/u-boot-rockchip

This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).

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rockchip: mkimage: Allow encoding of loader code in spl images

Rockchip SoCs allow the spl code to be rc4-encoded, not only the
image header, but only newer SoCs allow this encoding to be disabled.

rockchip: mkimage: Allow encoding of loader code in spl images

Rockchip SoCs allow the spl code to be rc4-encoded, not only the
image header, but only newer SoCs allow this encoding to be disabled.

The rk3188 is not part of those and requires its boot code to be
rc4-encoded with the regular key. So add the ability to do this
encoding via a setting on a per-soc basis when building spl images.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

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Merge git://git.denx.de/u-boot-rockchip

rockchip: mkimage: use imagename to select spl hdr & spl size

Our chips may have different spl size and spl header, so
use imagename(passed by "mkimage -n") to select them now.

Signed-off-by: Jeffy

rockchip: mkimage: use imagename to select spl hdr & spl size

Our chips may have different spl size and spl header, so
use imagename(passed by "mkimage -n") to select them now.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Revert "rockchip: Add max spl size & spl header configs"

This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sj

Revert "rockchip: Add max spl size & spl header configs"

This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: Add support for rk's second level loader

The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial

rockchip: Add support for rk's second level loader

The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>

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rockchip: Add max spl size & spl header configs

Our chips may have different max spl size and spl header, so
we need to add configs for that.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
A

rockchip: Add max spl size & spl header configs

Our chips may have different max spl size and spl header, so
we need to add configs for that.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
Added $(if...) to tools/Makefile to fix widespread build breakage
Signed-off-by: Simon Glass <sjg@chromium.org>

Series-changes: 8
- Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
- Add $(if...) to tools/Makefile to fix widespread build breakage

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Merge git://git.denx.de/u-boot-rockchip

rockchip: Drop first 32kb of zeros from the rkSD image type

Instead of creating a rockchip SPL SD card image with 32KB of zeros
which can be written to the start of an SD card, create the images wit

rockchip: Drop first 32kb of zeros from the rkSD image type

Instead of creating a rockchip SPL SD card image with 32KB of zeros
which can be written to the start of an SD card, create the images with
only the useful data that should be written to an offset of 32KB on the
SD card.

The first 32 kilobytes aren't needed for bootup and only serve as
convenient way of accidentally obliterating your partition table.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>

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rockchip: Add support for the SD image

The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.

Add

rockchip: Add support for the SD image

The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.

Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.

Signed-off-by: Simon Glass <sjg@chromium.org>

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