Merge branch '2019-01-25-master-imports'

- snapdragon 820c improvements
- poplar updates
- DFU + SPL cleanups
- Improve the mediatek mmc driver
- Other minor cleanups / improvements

drivers: esdhc: add support for ColdFire mcf5441x family

This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.

Signed-off-by: Angelo Duregh

drivers: esdhc: add support for ColdFire mcf5441x family

This patch has been tested on the mcf54415-based stmark2
board. The eSDHC driver works reliably using DMA mode.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>

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SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-imx

mmc: fsl_esdhc: support SDR104 and HS200

Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
- Implement esdhc_change_pinstate to dy

mmc: fsl_esdhc: support SDR104 and HS200

Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
- Implement esdhc_change_pinstate to dynamically change pad settings
- Implement esdhc_set_timing
- Implement esdhc_set_voltage to switch voltage
- Implement fsl_esdhc_execute_tuning to execute time process
- Enlarge the cfg->f_max to 200MHz.
- Parse fsl,tuning-step, fsl,tuning-start-tap and
fsl,strobe-dll-delay-target from device tree.
- Parse no-1-8-v property
- Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

mmc: fsl_esdhc: Fix PIO timeout

The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.

It was caused by the timeout set on PRSSTAT.BWEN, whi

mmc: fsl_esdhc: Fix PIO timeout

The following error has been observed on i.MX25 with a high-speed SDSC
card:
Data Write Failed in PIO Mode.

It was caused by the timeout set on PRSSTAT.BWEN, which was triggered
because this bit takes 15 ms to be set after writing the first block to
DATPORT with this card. Without this timeout, all the blocks are
properly written.

This timeout was implemented by decrementing a variable, so it was
depending on the CPU frequency. Fix this issue by setting this timeout
to a long enough absolute duration (500 ms).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O

When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in

mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O

When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.

We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

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mmc: fsl_esdhc: correct type of wp_enable

The type should be int, not u8. cfg->wp_enable will finally be
assigned to priv->wp_enable whose type is int.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

treewide: replace #include <asm/errno.h> with <linux/errno.h>

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)

Replace

treewide: replace #include <asm/errno.h> with <linux/errno.h>

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

mmc: fsl: introduce wp_enable

Introudce wp_enable. To check WPSPL, wp_enable needs to be set
to 1 in board code.

Take i.MX6UL for example, for some boards, they do not use WP singal,
so they does n

mmc: fsl: introduce wp_enable

Introudce wp_enable. To check WPSPL, wp_enable needs to be set
to 1 in board code.

Take i.MX6UL for example, for some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.

If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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mmc: fsl: reset to normal boot mode when eMMC fast boot

When booting in eMMC fast boot, MMC host does not exit from
boot mode after bootrom loading image. So the first command
'CMD0' sent in uboot w

mmc: fsl: reset to normal boot mode when eMMC fast boot

When booting in eMMC fast boot, MMC host does not exit from
boot mode after bootrom loading image. So the first command
'CMD0' sent in uboot will pull down the CMD line to low and
cause errors.

This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.

Also clear DLL_CTRL delay line settings at USDHC initialization
to eliminate the pre-settings from boot rom.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

fsl: esdhc: consolidate fsl_esdhc_cfg structure

We can use phys_addr_to for esdhc_base to discard
the #ifdef.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yan

fsl: esdhc: consolidate fsl_esdhc_cfg structure

We can use phys_addr_to for esdhc_base to discard
the #ifdef.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-imx

ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register

The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking

ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl register

The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.

Guard against their usage by hiding the bit mask macros on those
processors.

These bits are used to prevent glitches when changing clocks on
i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7.

>From the i.MX6DQ RM:
To prevent possible glitch on the card clock, clear the
FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS
or DVS in System Control Register) or setting RSTA bit.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Hector Palacios <hector.palacios@digi.com>

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Merge git://git.denx.de/u-boot

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardb

This patch adds esdhc support for ls1043ardb.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@fr

armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardb

This patch adds esdhc support for ls1043ardb.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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Merge git://git.denx.de/u-boot-mpc85xx

Merge branch 'u-boot/master' into 'u-boot-arm/master'

mmc: fsl_esdhc: Add peripheral clock support

The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080.

mmc: fsl_esdhc: Add peripheral clock support

The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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mmc: fsl_esdhc: Add adapter card type identification support

Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CON

mmc: fsl_esdhc: Add adapter card type identification support

Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun <yorksun@freescale.com>

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