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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07, v2018.03, v2018.01, v2017.11, v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1 |
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| #
d81572c2 |
| 05-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
2d9ca2c7 |
| 22-Apr-2015 |
Yangbo Lu <yangbo.lu@freescale.com> |
mmc: fsl_esdhc: Add peripheral clock support
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080.
mmc: fsl_esdhc: Add peripheral clock support
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
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Revision tags: v2015.04, v2015.04-rc5, v2015.04-rc4 |
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| #
1c6f6a6e |
| 05-Mar-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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Revision tags: v2015.04-rc3, v2015.04-rc2, v2015.04-rc1 |
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| #
b8bf0adc |
| 19-Jan-2015 |
Shaveta Leekha <shaveta@freescale.com> |
powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs
The code provides framework for heterogeneous multicore chips based on StarCore
and Power Architecture which are chasis-2 com
powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs
The code provides framework for heterogeneous multicore chips based on StarCore
and Power Architecture which are chasis-2 compliant, like B4860 and B4420
It will make u-boot recognize all non-ppc cores and peripherals like
SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
Example boot logs of B4860QDS:
U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45)
CPU0: B4860E, Version: 2.2, (0x86880022)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
CCB:666.667 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
CPRI:600 MHz
MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz
FMAN1: 666.667 MHz
QMAN: 333.333 MHz
Top level changes include:
(1) Top level CONFIG to identify HETEROGENUOUS clusters
(2) CONFIGS for SC3900/DSP components
(3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
updated for dsp cores and other components
(3) APIs to get DSP num cores and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
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Revision tags: v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2, v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2 |
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e7f93505 |
| 15-May-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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Revision tags: v2014.07-rc1 |
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d2a3e911 |
| 09-May-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master'
Conflicts:
drivers/net/Makefile
(trivial merge)
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080d8975 |
| 25-Apr-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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0c12a159 |
| 15-Apr-2014 |
vijay rai <vijay.rai@freescale.com> |
powerpc/85xx: Enhance get_sys_info() to check clocking mode
T1040 and it's variants provide "Single Oscillator Source" Reference Clock Mode.
In this mode, single onboard oscillator(DIFF_SYSCLK) can
powerpc/85xx: Enhance get_sys_info() to check clocking mode
T1040 and it's variants provide "Single Oscillator Source" Reference Clock Mode.
In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the reference clock
(100MHz) to the following PLLs:
• Platform PLL
• Core PLLs
• USB PLL
• DDR PLL, etc
The cfg_eng_use0 of porsr1 register identifies whether the SYSCLK (single-ended) or
DIFF_SYSCLK (differential) is selected as the clock input to the chip.
get_sys_info has been enhanced to add the diff_sysclk so that the
various drivers can be made aware of ths diff sysclk configuration and
act accordingly.
Other changes:
-single_src to ddr_refclk_sel, as it is use for checking ddr reference clock
-Removed the print of single_src from get_sys_info as this will be
-printed whenever somebody calls get_sys_info which is not appropriate.
-Add print of single_src in checkcpu as it is called only once during initialization
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
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Revision tags: v2014.04, v2014.04-rc3, v2014.04-rc2, v2014.04-rc1, v2014.01, v2014.01-rc3, v2014.01-rc2, v2014.01-rc1, v2013.10, v2013.10-rc4, v2013.10-rc3, v2013.10-rc2 |
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| #
6612ab33 |
| 21-Aug-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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Revision tags: v2013.10-rc1 |
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| #
997399fa |
| 16-Aug-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc: Fix CamelCase checkpatch warnings
85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCas
powerpc: Fix CamelCase checkpatch warnings
85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCase".
Convert variables name to normal naming convention and modify board, driver
files with updated the new structure.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
show more ...
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Revision tags: v2013.07, v2013.07-rc3, v2013.07-rc2, v2013.07-rc1, v2013.04, v2013.04-rc3, v2013.04-rc2, v2013.04-rc1, v2013.01.01, v2013.01, v2013.01-rc3, v2013.01-rc2 |
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| #
3e4d27b0 |
| 10-Nov-2012 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot
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Revision tags: v2013.01-rc1 |
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| #
c7656bab |
| 22-Oct-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
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Revision tags: v2012.10 |
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| #
990e1a8c |
| 11-Oct-2012 |
Haiying Wang <Haiying.Wang@freescale.com> |
poweprc/85xx: add QMan frequency info and fdt fixup.
Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel
driver can use it to calculate the shaper prescaler and rate.
Si
poweprc/85xx: add QMan frequency info and fdt fixup.
Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel
driver can use it to calculate the shaper prescaler and rate.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
show more ...
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Revision tags: v2012.10-rc3, v2012.10-rc2, v2012.10-rc1, v2012.07, v2012.07-rc3, v2012.07-rc2, v2012.07-rc1, v2012.04.01, v2012.04, v2012.04-rc3, v2012.04-rc2, v2012.04-rc1, v2011.12, v2011.12-rc3, v2011.12-rc2, v2011.12-rc1, v2011.09, v2011.09-rc2, v2011.09-rc1, v2011.06, v2011.06-rc3, v2011.06-rc2, v2011.06-rc1, v2011.03, v2011.03-rc2, v2011.03-rc1, v2010.12, v2010.12-rc3, v2010.12-rc2, v2010.12-rc1, v2010.09, v2010.09-rc2, v2010.09-rc1, v2010.06, v2010.06-rc3, v2010.06-rc2, v2010.06-rc1, v2010.03, v2010.03-rc3, v2010.03-rc2, v2010.03-rc1, v2009.11.1, v2009.11, v2009.11-rc2, v2009.11-rc1, v2009.08, v2009.08-rc3, v2009.08-rc2, v2009.08-rc1, v2009.06, v2009.06-rc3, v2009.06-rc2, v2009.06-rc1, v2009.03 |
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| #
4dea2bbc |
| 19-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we
ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
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5e498dfa |
| 24-Sep-2009 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of /home/wd/git/u-boot/custodians
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39aaca1f |
| 19-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we
ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
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| #
3aa8b68d |
| 31-Aug-2009 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'next' of ../next
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0e870980 |
| 31-Jul-2009 |
Poonam Aggrwal <poonam.aggrwal@freescale.com> |
8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms
8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.
This can help to use the same u-boot image across the platforms.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
show more ...
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92afd368 |
| 14-Jun-2009 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'next' of ../master
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b3d7f20f |
| 20-May-2009 |
Haiying Wang <Haiying.Wang@freescale.com> |
85xx: Add QE clk support
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <Timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Revision tags: v2009.03-rc2, v2009.03-rc1 |
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| #
ef29884b |
| 24-Jan-2009 |
Ben Warren <biggerbadderben@gmail.com> |
Merge git://git.denx.de/u-boot into u-boot
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| #
8f86a363 |
| 23-Jan-2009 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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Revision tags: v2009.01, v2009.01-rc3 |
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| #
2fc7eb0c |
| 15-Jan-2009 |
Haiying Wang <Haiying.Wang@freescale.com> |
Add secondary CPUs processor frequency for e500 core
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
Add secondary CPUs processor frequency for e500 core
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
show more ...
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be4880eb |
| 21-Jan-2009 |
Kim Phillips <kim.phillips@freescale.com> |
Merge branch 'master' into next
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Revision tags: v2009.01-rc2 |
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| #
f85cd469 |
| 30-Dec-2008 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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