Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07 |
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fb77a9e3 |
| 28-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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240cd756 |
| 25-Jun-2018 |
Vipul Kumar <vipul.kumar@xilinx.com> |
spi: zynq_qspi: Fixed incorrect return value error
This patch replaced "return 0" with "return status" to fix the incorrect return value error reported by the coverity.
Reviewed-by: Michal Simek <m
spi: zynq_qspi: Fixed incorrect return value error
This patch replaced "return 0" with "return status" to fix the incorrect return value error reported by the coverity.
Reviewed-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> [jagan: rebased on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01, v2017.11 |
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21342d4a |
| 08-Feb-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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e160f7d4 |
| 17-Jan-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree,
dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Revision tags: v2016.07, openbmc-20160624-1 |
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4832e177 |
| 18-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
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04a44d36 |
| 08-Dec-2015 |
Nathan Rossi <nathan@nathanrossi.com> |
spi: zynq_qspi: Add configuration to disable LQSPI feature
When the Zynq Boot ROM code loads the payload from QSPI it uses the LQSPI feature of the QSPI device, however it does not clean up its conf
spi: zynq_qspi: Add configuration to disable LQSPI feature
When the Zynq Boot ROM code loads the payload from QSPI it uses the LQSPI feature of the QSPI device, however it does not clean up its configuration before handing over to the payload which leaves the device confgured to by-pass the standard non-linear operating mode.
This ensures the Linear QSPI mode is disabled before re-enabling the device.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2016.01-rc1 |
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e573bdb3 |
| 30-Oct-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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446d37c1 |
| 28-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
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9cf2ffb3 |
| 22-Oct-2015 |
Jagan Teki <jteki@openedev.com> |
spi: zynq_[q]spi: Use GENMASK macro
GENMASK macro used on zynq_spi.c and zynq_qspi.c
GENMASK is used to create a contiguous bitmask([hi:lo]). Ex: (0x7 << 3) => GENMASK(5, 3)
Cc: Michal Simek <mich
spi: zynq_[q]spi: Use GENMASK macro
GENMASK macro used on zynq_spi.c and zynq_qspi.c
GENMASK is used to create a contiguous bitmask([hi:lo]). Ex: (0x7 << 3) => GENMASK(5, 3)
Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
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736b4df1 |
| 22-Oct-2015 |
Jagan Teki <jteki@openedev.com> |
spi: zynq_[q]spi: Use BIT macro
Used BIT macro on zynq_spi.c and zynq_qspi.c
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Pras
spi: zynq_[q]spi: Use BIT macro
Used BIT macro on zynq_spi.c and zynq_qspi.c
:%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31
Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
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e5e0d68f |
| 24-Oct-2015 |
Jagan Teki <jteki@openedev.com> |
spi: zynq_qspi: Minor cleanups
- Use __func__ on debug - Removed unnecessary comment - Fix function name in debug as zynq_qspi_xfer instead of spi_xfer
Signed-off-by: Jagan Teki <jteki@openedev.com>
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Revision tags: v2015.10, v2015.10-rc5, v2015.10-rc4 |
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2775e918 |
| 07-Sep-2015 |
Jagan Teki <jteki@openedev.com> |
spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use
spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use mode from .set_speed argument, and at the end priv->mode will initialized with mode.
This patch also replaces formatting string to use speed instead of mode in .set_speed ops.
Signed-off-by: Jagan Teki <jteki@openedev.com>
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Revision tags: v2015.10-rc3, v2015.10-rc2 |
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46d0a991 |
| 17-Aug-2015 |
Jagan Teki <jteki@openedev.com> |
spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support.
=> sf probe SF: Detected S25FL128S_64K with
spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC, this driver is driver-model driven with devicetree support.
=> sf probe SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB => mw.b 0x100 0xCC 0x1000000 => sf update 0x100 0x0 0x1000000 device 0 whole chip 16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s => sf read 0x3000000 0x0 0x1000000 device 0 whole chip SF: 16777216 bytes @ 0x0 Read: OK => cmp.b 0x3000000 0x100 0x1000000 Total of 16777216 byte(s) were the same
Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com>
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