History log of /openbmc/u-boot/drivers/pci/pci_auto.c (Results 1 – 25 of 80)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01
# 7621ec44 17-Dec-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04

# Conflicts:
# arch/arm/dts/ast2600.dtsi


# 47075cb7 17-Dec-2019 ryan_chen <ryan_chen@aspeedtech.com>

[update] pcie bridge and h2x driver


# e87eb270 05-Dec-2019 Johnny Huang <johnny_huang@aspeedtech.com>

Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04


# 8e77eee7 01-Dec-2019 Chia-Wei, Wang <chiawei_wang@aspeedtech.com>

Merge branch 'feature/dcache_off' into aspeed-dev-v2019.04


# 25221c69 01-Dec-2019 Chia-Wei, Wang <chiawei_wang@aspeedtech.com>

pci: aspeed: Fix compile warning

Fix compile warning caused by implicit function declaration


# c334091c 08-Nov-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# 02a85499 08-Nov-2019 ryan_chen <ryan_chen@aspeedtech.com>

update for pcie gen2 re-training


# 6a69dbe2 03-Nov-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# 4681a39e 03-Nov-2019 ryan_chen <ryan_chen@aspeedtech.com>

fix large space for memory allocation


Revision tags: v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07
# d71975ae 14-May-2018 Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>

PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources

Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventu

PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources

Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

show more ...


Revision tags: v2018.03, v2018.01, v2017.11
# 3977dcd5 19-Oct-2017 Minghuan Lian <Minghuan.Lian@nxp.com>

dm: pci: change bus number register setting compliant with Linux

This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the cur

dm: pci: change bus number register setting compliant with Linux

This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


Revision tags: v2016.07, openbmc-20160624-1
# d5c6144f 26-Feb-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# 6796704b 18-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

pci: Fix compiler warnings in dm_pciauto_setup_device()

Fix the following compiler warnings when DEBUG is on.

warning: 'bar_res' may be used uninitialized in this function.
drivers/pci/pci_auto.c:1

pci: Fix compiler warnings in dm_pciauto_setup_device()

Fix the following compiler warnings when DEBUG is on.

warning: 'bar_res' may be used uninitialized in this function.
drivers/pci/pci_auto.c:101:21:
if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
^

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 4439bc35 18-Jan-2016 Simon Glass <sjg@chromium.org>

dm: pci: Avoid using pci_bus_to_hose() in the uclass

This function is only available for compatibility with old code. Avoid
using it in the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Rev

dm: pci: Avoid using pci_bus_to_hose() in the uclass

This function is only available for compatibility with old code. Avoid
using it in the uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


# f19345b5 15-Jan-2016 Simon Glass <sjg@chromium.org>

dm: pci: Add a 'fall through' comment

For this class it is intended to set up the PCI device, so add a comment to
indicate this. This avoids a coverity warning.

Reported-by: Coverity (CID: 134194)

dm: pci: Add a 'fall through' comment

For this class it is intended to set up the PCI device, so add a comment to
indicate this. This avoids a coverity warning.

Reported-by: Coverity (CID: 134194)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

show more ...


# 077678eb 12-Jan-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# 5e23b8b4 29-Nov-2015 Simon Glass <sjg@chromium.org>

dm: pci: Use driver model PCI API in auto-config

At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correc

dm: pci: Use driver model PCI API in auto-config

At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.

Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


Revision tags: v2016.01-rc1
# a69fdc77 23-Oct-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 858dbdf8 21-Oct-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


Revision tags: v2015.10, v2015.10-rc5
# cdf9f085 01-Oct-2015 Bin Meng <bmeng.cn@gmail.com>

pci: Set PCI_COMMAND_IO bit for VGA device

PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simo

pci: Set PCI_COMMAND_IO bit for VGA device

PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

show more ...


# f74dc51b 15-Oct-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 13a39725 14-Oct-2015 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge remote-tracking branch 'u-boot/master'


# 38ab75a2 09-Oct-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 7445435f 07-Oct-2015 Bin Meng <bmeng.cn@gmail.com>

pci: Fix expansion ROM programming for multi-function devices

PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
for multi-function devices. We should mask it off before using
it as the he

pci: Fix expansion ROM programming for multi-function devices

PCI_HEADER_TYPE register (offset 0x0e) bit 7 is an indicator
for multi-function devices. We should mask it off before using
it as the header type.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

show more ...


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