Merge branch 'master' of git://git.denx.de/u-boot-net

net: phy: ti: Add binding for the CLK_OUT pin muxing

The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific

net: phy: ti: Add binding for the CLK_OUT pin muxing

The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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net: phy: ti: Recover from "port mirroring" N/A MODE4

The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal op

net: phy: ti: Recover from "port mirroring" N/A MODE4

The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Lukasz Majewski <lukma@denx.de>

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net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver

This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of

net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver

This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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Merge branch 'master' of git://git.denx.de/u-boot-net

net: phy: dp83867: switch to use phy_get_ofnode()

Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.

net: phy: dp83867: switch to use phy_get_ofnode()

Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

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net: phy: dp83867: switch to use ofnode api

Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hers

net: phy: dp83867: switch to use ofnode api

Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

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net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap

The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
s

net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap

The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).

It further advises that if a board has this pin strapped in mode 1 and
mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must
be cleared to 0. This is to ensure proper operation of PHY.

Since it is not possible to detect in software if RX_DV/RX_CTRL pin is
incorrectly strapped, add a device-tree property to advertise this and
allow corrective action in software.
[1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

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SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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dm: core: Replace of_offset with accessor (part 2)

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
devi

dm: core: Replace of_offset with accessor (part 2)

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-net

Merge git://git.denx.de/u-boot-dm

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree,

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

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net: phy: dp83867: Add support for MAC impedance configuration

Add support for programmable MAC impedance configuration and
fix typo in DT impedance parameters names.

Signed-off-by: Mugunthan V N <

net: phy: dp83867: Add support for MAC impedance configuration

Add support for programmable MAC impedance configuration and
fix typo in DT impedance parameters names.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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net: phy: ti: Fix dp83867 RGMII_TXID interface path

There is code that is specifically for RGMII_TXID interface, but this
will never get used because the code checks that the RGMII interface
is RGMI

net: phy: ti: Fix dp83867 RGMII_TXID interface path

There is code that is specifically for RGMII_TXID interface, but this
will never get used because the code checks that the RGMII interface
is RGMII_ID to RGMII_RXID; RGMII_TXID is after this.

To fix this and avoid similar problems in the future, use the
phy_interface_is_rgmii helper function.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-net

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
drivers/net/zynq_gem.c

net: phy: dp83867: Add SGMII helper for configuration

The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of

net: phy: dp83867: Add SGMII helper for configuration

The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of the MII interfaces. Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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net: phy: Move is_rgmii helper to phy.h

Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d4

net: phy: Move is_rgmii helper to phy.h

Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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net: phy: ti: Allow the driver to be more configurable

Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the de

net: phy: ti: Allow the driver to be more configurable

Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree. If the value is not set in the
devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the
driver.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

net: phy: Add SGMII support for TI phy

Add support of SGMII to TI phy dp838367
Enable the SGMII and PCS settings in phy
control, CFG2 and BIST registers

Signed-off-by: Siva Durga Prasad Paladugu <s

net: phy: Add SGMII support for TI phy

Add support of SGMII to TI phy dp838367
Enable the SGMII and PCS settings in phy
control, CFG2 and BIST registers

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

net: phy: ti: Enable automatic crossover mode

Enable automatic crossover cable detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx

net: phy: ti: Enable automatic crossover mode

Enable automatic crossover cable detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze