History log of /openbmc/u-boot/drivers/net/pcnet.c (Results 1 – 25 of 51)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07
# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.03, v2018.01, v2017.11, v2016.07, openbmc-20160624-1
# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# da6e2fab 31-May-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-mips


# bed1ca32 26-May-2016 Paul Burton <paul.burton@imgtec.com>

net: pcnet: Fix init on big endian 64 bit

If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will inco

net: pcnet: Fix init on big endian 64 bit

If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# 442d2e01 26-May-2016 Paul Burton <paul.burton@imgtec.com>

net: pcnet: Make 64 bit safe

Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com

net: pcnet: Make 64 bit safe

Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# 4677d665 26-May-2016 Paul Burton <paul.burton@imgtec.com>

net: pcnet: Stop converting kseg1->kseg0 addresses

Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

net: pcnet: Stop converting kseg1->kseg0 addresses

Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# b57843e6 16-Jan-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-mips


# df50b3b4 12-Jan-2016 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

net: pcnet: refactor mapping of virtual addresses to physical ones

pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses whi

net: pcnet: refactor mapping of virtual addresses to physical ones

pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses which
is wrong according to the documentation of virt_to_phys().

Refactor the PCI_TO_MEM() macro to optionally map an uncached address
back to a cached one before calling pci_virt_to_mem().

Currently pcnet works because virt_to_phys() is incorrectly implemented
on MIPS. With the upcoming asm header file update for MIPS, the
virt_to_phys() implementation will be fixed. Thus this patch is needed
to keep pcnet working on MIPS Malta board.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

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Revision tags: v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1
# b939689c 05-May-2015 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into 'u-boot-arm/master'


Revision tags: v2015.04
# 1fd92db8 08-Apr-2015 Joe Hershberger <joe.hershberger@ni.com>

net: cosmetic: Fix var naming net <-> eth drivers

Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the te

net: cosmetic: Fix var naming net <-> eth drivers

Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the temporary hacks that were added to this interface
along with the DM support.

This patch has a few remaining checkpatch.pl failures that would be out
of the scope of this patch to fix (drivers that are in gross violation
of checkpatch.pl).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Revision tags: v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4, v2015.01-rc3, v2015.01-rc2, v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2
# e7f93505 15-May-2014 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-arm


Revision tags: v2014.07-rc1
# d2a3e911 09-May-2014 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master'

Conflicts:
drivers/net/Makefile

(trivial merge)


Revision tags: v2014.04
# 6fb49e4a 07-Apr-2014 Paul Burton <paul.burton@imgtec.com>

pcnet: force ordering of descriptor accesses

The ordering of accesses to the rx & tx descriptors is important, yet
the send & recv functions accessed them via regular structure accesses.
This leaves

pcnet: force ordering of descriptor accesses

The ordering of accesses to the rx & tx descriptors is important, yet
the send & recv functions accessed them via regular structure accesses.
This leaves the compiler with the opportunity to reorder those accesses
or to hoist them outside of loops. Prevent that from happening by using
readl & writel to access the descriptors. As a nice bonus, this removes
the need for the driver to care about endianness.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# a354ddc3 07-Apr-2014 Paul Burton <paul.burton@imgtec.com>

pcnet: align rx buffers for cache invalidation

The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv

pcnet: align rx buffers for cache invalidation

The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
suitable alignment for the cache invalidation, preventing anything else
being placed in the same lines & lost.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# f1ae382d 07-Apr-2014 Paul Burton <paul.burton@imgtec.com>

pcnet: access descriptor rings & init block uncached

The prior accesses to the descriptor rings & init block via cached
memory had a few issues:

- The memory needs cache flushes or invalidation a

pcnet: access descriptor rings & init block uncached

The prior accesses to the descriptor rings & init block via cached
memory had a few issues:

- The memory needs cache flushes or invalidation at the appropriate
times, but was not necessarily aligned on cache line boundaries.
This could lead to data being incorrectly lost or written back to
RAM at the wrong time.

- There are points where ordering of writes to the memory is
important, but because it's cached memory the pcnet controller
would see cache lines written back ordered by address. This could
occasionally lead to hardware seeing descriptors in an incorrect
state.

- Flushing the cache constantly is inefficient.

So, to avoid all of those issues simply access the descriptors & init
block via uncached memory. The MIPS-specific UNCACHED_SDRAM macro is
used to do this (retrieving an address in kseg1) as I could see no
existing generic solution. Since the MIPS Malta board is the only user
of the pcnet driver, hopefully this doesn't matter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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Revision tags: v2014.04-rc3, v2014.04-rc2, v2014.04-rc1, v2014.01, v2014.01-rc3, v2014.01-rc2
# f15ea6e1 10-Dec-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard

Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compul

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard

Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds

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Revision tags: v2014.01-rc1
# 649acfe1 11-Nov-2013 Wolfgang Denk <wd@denx.de>

MPC824x: remove obsolete "PN62" board

The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues

MPC824x: remove obsolete "PN62" board

The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues. Instead of wasting time on things nobody is
interested in any more, we rather drop this board.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
cc: Tom Rini <trini@ti.com>

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# 60390d70 11-Nov-2013 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mips


# 62715a2c 08-Nov-2013 Paul Burton <paul.burton@imgtec.com>

pcnet: enable the NOUFLO feature

On relatively slow boards (such as the MIPS Malta with an FPGA core
card) it can be extremely common for transmits to underflow - to the
point where it appears they

pcnet: enable the NOUFLO feature

On relatively slow boards (such as the MIPS Malta with an FPGA core
card) it can be extremely common for transmits to underflow - to the
point where it appears they simply do not work at all. Setting the
NOUFLO bit causes the ethernet controller to not begin transmission on
the wire until a transmit start point is reached. Setting that transmit
start point to the full packet will cause the controller to only
transmit the packet once it has buffered it entirely thus preventing any
transmit underflows from occuring and allowing the controller to
function on slower boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# f3ac866c 08-Nov-2013 Paul Burton <paul.burton@imgtec.com>

pcnet: add cache flushing & invalidation

Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data fr

pcnet: add cache flushing & invalidation

Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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# a9540041 08-Nov-2013 Paul Burton <paul.burton@imgtec.com>

pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_send

This should cause no change to the generated code, but is semantically
correct.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>


# 6011dabd 08-Nov-2013 Paul Burton <paul.burton@imgtec.com>

pcnet: code style cleanup

Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.

No functional change is intended.

Signed-off-by: Paul Burton <paul.burton@i

pcnet: code style cleanup

Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.

No functional change is intended.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

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Revision tags: v2013.10, v2013.10-rc4, v2013.10-rc3, v2013.10-rc2, v2013.10-rc1
# 326ea986 31-Jul-2013 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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# 8b485ba1 25-Jul-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into u-boot-arm/master


# 230187ce 24-Jul-2013 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mips

Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.

Conflicts:
arch/mi

Merge branch 'master' of git://git.denx.de/u-boot-mips

Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.

Conflicts:
arch/mips/cpu/mips64/start.S

Signed-off-by: Tom Rini <trini@ti.com>

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