Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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35890258 |
| 07-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch '2018-12-06-master-imports'
- Various FAT fixes - Hardware spinlock uclass - DMA uclass - Various am335x fixes - DT resyncs for a number of TI platforms - stm32 updates
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9119f547 |
| 27-Nov-2018 |
Benjamin Gaignard <benjamin.gaignard@linaro.org> |
hwspinlock: add stm32 hardware spinlock support
Implement hardware spinlock support for STM32MP1.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Simon Glass <sjg@chromium.
hwspinlock: add stm32 hardware spinlock support
Implement hardware spinlock support for STM32MP1.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
show more ...
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7f84fc67 |
| 27-Nov-2018 |
Benjamin Gaignard <benjamin.gaignard@linaro.org> |
dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation.
Signed-off-by: Benjamin Gaignard <be
dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
show more ...
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