Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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43a6a1ec |
| 09-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch '2019-01-08-master-imports'
- stm32f7 GPIO fixes - SATA env fixes - More DM migration deadline warnings - Regression fix for non-DM MMC drivers - dma_alloc_coherent size fix on ARM.
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4fb22463 |
| 04-Jan-2019 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Fix SPL code size
In order to keep SPL code size below the 32Kb limit, put under CONFIG_SPL_BUILD flag all unused code in SPL. This is needed for stm32f7xx board which are using SPL.
gpio: stm32f7: Fix SPL code size
In order to keep SPL code size below the 32Kb limit, put under CONFIG_SPL_BUILD flag all unused code in SPL. This is needed for stm32f7xx board which are using SPL.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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39a8f0be |
| 04-Jan-2019 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Fix gpio bank hole management
In case "gpio-ranges" property is not present in device tree, use default value for gpio_count and gpio_range. This fixes an issue on stm32 F7 and H7 boa
gpio: stm32f7: Fix gpio bank hole management
In case "gpio-ranges" property is not present in device tree, use default value for gpio_count and gpio_range. This fixes an issue on stm32 F7 and H7 boards where "pinmux status -a" command didn't return any pin status due to the fact that both stm32 F7 and H7 board DT doesn't use the gpio-ranges property.
Fixes: dbf928dd2634a6("gpio: stm32f7: Add gpio bank holes management")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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35890258 |
| 07-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch '2018-12-06-master-imports'
- Various FAT fixes - Hardware spinlock uclass - DMA uclass - Various am335x fixes - DT resyncs for a number of TI platforms - stm32 updates
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8b6d45ab |
| 03-Dec-2018 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Remove CONFIG_CLK flag.
As all STM32 SoCs supports CONFIG_CLK flag, it becomes useless in this driver, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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b2f84e37 |
| 03-Dec-2018 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
To allow access to this define by other driver, move it into gpio.h
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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dbf928dd |
| 03-Dec-2018 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the
gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the gpio bank or a combination of these 3 configurations.
For that, gpio bindings offer the gpio-ranges DT property which described the gpio bank mapping.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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0c4b382f |
| 17-Nov-2018 |
Tom Rini <trini@konsulko.com> |
Merge branch '2018-11-16-master-imports'
- Initial bcm968580xref, am65x_evm_r5 support - lpc32xx, omap3_logic/am3517_evm updates - pinctrl command - fs_loader available for SPL
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cad73249 |
| 24-Oct-2018 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: Add ops get_function
This patch adds gpio get_function ops support. This function reports the state of a gpio.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-
gpio: stm32f7: Add ops get_function
This patch adds gpio get_function ops support. This function reports the state of a gpio.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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1d6edcbf |
| 16-Nov-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dm
- virtio implementation and supporting patches - DM_FLAG_PRE_RELOC fixes - regmap improvements - minor buildman and sandbox things
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695c4994 |
| 24-Oct-2018 |
Bin Meng <bmeng.cn@gmail.com> |
gpio: Remove DM_FLAG_PRE_RELOC flag in various drivers
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only take
gpio: Remove DM_FLAG_PRE_RELOC flag in various drivers
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage.
To mitigate this potential impact, the following changes are implemented:
- Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
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798cd708 |
| 09-Aug-2018 |
Patrice Chotard <patrice.chotard@st.com> |
gpio: stm32f7: replace ODR update by BSRR write
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 writ
gpio: stm32f7: replace ODR update by BSRR write
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 write operation).
Moreover this register if safe for simultaneous access by 2 master on the bus.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Revision tags: v2018.07 |
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03 |
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f11c308a |
| 12-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
gpio: stm32f7_gpio: handle node ngpios
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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d876eaf2 |
| 12-Mar-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
dm: gpio: Convert stm32f7 driver to livetree
Update the GPIO driver to support a live device tree.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.c
dm: gpio: Convert stm32f7 driver to livetree
Update the GPIO driver to support a live device tree.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Revision tags: v2018.01, v2017.11 |
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3bc599c9 |
| 23-Oct-2017 |
Patrice Chotard <patrice.chotard@st.com> |
stm32: fix STMicroelectronics copyright
Uniformize STMicroelectronics copyrights headers for STM32 related code.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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a821c4af |
| 17-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing function
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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4f66e09b |
| 09-May-2017 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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77417102 |
| 10-Apr-2017 |
Vikas Manocha <vikas.manocha@st.com> |
dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <
dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Christophe KERELLO <christophe.kerello@st.com> [trini: Add depends on STM32] Signed-off-by: Tom Rini <trini@konsulko.com>
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