Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04 |
|
#
d019953d |
| 10-Apr-2020 |
ryan_chen <ryan_chen@aspeedtech.com> |
fix env compile error
|
#
2453cde9 |
| 15-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/spl_size_reduction' into aspeed-dev-v2019.04
|
#
688ce756 |
| 15-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
spl: ast2600: Reduce SPL image size
AST2600 A1 secure boot places BL1 image (i.e. SPL) into a 64KB SRAM for verification and execution. This patch mainly reduce the SPL image size.
Within the 64KB
spl: ast2600: Reduce SPL image size
AST2600 A1 secure boot places BL1 image (i.e. SPL) into a 64KB SRAM for verification and execution. This patch mainly reduce the SPL image size.
Within the 64KB space, 6KB space is reserved for the secure boot image signature, key, and SPL stack/heap. Hence, the SPL image size has the 58KB limitation and is enforced by the linker script.
show more ...
|
#
6a139b06 |
| 14-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/stack_size' into aspeed-dev-v2019.04
|
#
e735be80 |
| 14-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
config: ast2600: Reduce malloc reservsation size
Reduce the reserved INIT_RAM size for malloc use from 8KB to 2KB.
|
Revision tags: v2020.01 |
|
#
643dafa5 |
| 06-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/boot_from_uart' into aspeed-dev-v2019.04
|
#
2c659fbc |
| 06-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ast2600: Add Boot-from-UART detection
AST2600 supports booting from UART5, which accepts a succeeding bootloader image for recovery or test purposes.
|
#
e436c2b8 |
| 02-Jan-2020 |
Dylan Hung <dylan_hung@aspeedtech.com> |
Merge branch 'aspeed-dev-v2019.04' of ssh://192.168.10.30:7999/bmc/u-boot into aspeed-dev-v2019.04
|
#
42f1d86f |
| 02-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'bugfix/bootcmd' into aspeed-dev-v2019.04
|
#
d11a297b |
| 02-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ast2600: Fix boot command
The boot image is shifted from 0x200a0000 to 0x20100000. This patch updates the boot command to fix the autoboot failure.
|
#
baf56e67 |
| 31-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/secure_boot' into aspeed-dev-v2019.04
|
#
a33e7567 |
| 30-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
configs: Aspeed: Sync SPL configuration for AST2600
|
#
e87eb270 |
| 05-Dec-2019 |
Johnny Huang <johnny_huang@aspeedtech.com> |
Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04
|
#
5e3d9658 |
| 02-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'bugfix/ram_config' into aspeed-dev-v2019.04
|
#
92a5848d |
| 02-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
config: aspeed: Fix RAM selection
The Aspeed RAM-related configurations should 'depends on' the top-level CONFIG_RAM instead of 'select' in Kconfig.
The CONFIG_RAM and CONFIG_SPL_RAM is also added
config: aspeed: Fix RAM selection
The Aspeed RAM-related configurations should 'depends on' the top-level CONFIG_RAM instead of 'select' in Kconfig.
The CONFIG_RAM and CONFIG_SPL_RAM is also added in Aspeed default configuration to enable RAM support.
show more ...
|
#
8e77eee7 |
| 01-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/dcache_off' into aspeed-dev-v2019.04
|
#
1b2c52d8 |
| 01-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ARM: aspeed: Disable D-cache by default
There are lots of cacheline size unaligned data structures in U-Boot. The misaligned cache operation on these structure variables can lead to functional failu
ARM: aspeed: Disable D-cache by default
There are lots of cacheline size unaligned data structures in U-Boot. The misaligned cache operation on these structure variables can lead to functional failure.
This patch disables D-cache use by default. Users must aware the cacheline alignment of variables before enabling D-cache.
show more ...
|
#
cc85df2d |
| 27-Nov-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/config_refactor' into aspeed-dev-v2019.04
|
#
3ac4a7de |
| 27-Nov-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
config: aspeed: Move configuration into defconfig
Move configuration that is recognized by the Kbuild system back to defconfig. By doing this, the inconsistency between configuration written in head
config: aspeed: Move configuration into defconfig
Move configuration that is recognized by the Kbuild system back to defconfig. By doing this, the inconsistency between configuration written in header files and defconfig can be avoided.
show more ...
|
#
2e6403a5 |
| 18-Nov-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'feature/ast2600_a0_a1' into aspeed-dev-v2019.04
|
#
fb79a3bf |
| 18-Nov-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ast2600: Separate A0 and A1 configuration files
Add individual Kconfig, header, and defconfig files AST2600 A0 and AST2600 A1 EVB board.
|