Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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ce0d1e48 |
| 24-Jan-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04
tools: - Fix zynqmpimage generation
zynq: - Some configs/Kconfig/DT updates - Enable REMAKE_ELF a
Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04
tools: - Fix zynqmpimage generation
zynq: - Some configs/Kconfig/DT updates - Enable REMAKE_ELF and OF_SEPARATE - Topic boards update - i2c cleanups and conversion to DM_I2C
zynqmp: - Some configs/Kconfig/DT updates - Board config cleanup - Move arch folder to mach-zynqmp
versal: - Enable DM_I2C, CMD_DM
zynq-gem: - Fix driver cache handling
i2c: - Live tree simple update
phy: - Fixed phy cleanup
travis: - Wire Versal SoC
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acc58a4a |
| 18-Jan-2019 |
Mike Looijmans <mike.looijmans@topic.nl> |
board: topic-miamiplus: Run IO PLL at 1000 MHz
The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so cha
board: topic-miamiplus: Run IO PLL at 1000 MHz
The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so change it to run at 1000 and adjust the divisors accordingly. Also set the GEM0 clock source to MIO instead of EMIO.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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58205903 |
| 18-Jan-2019 |
Mike Looijmans <mike.looijmans@topic.nl> |
topic-miamiplus: Run CPU at 800MHz for speedgrade-2
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz. Change the PLL setting to 800MHz, and adapt the setpoints in the de
topic-miamiplus: Run CPU at 800MHz for speedgrade-2
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz. Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2018.07 |
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01 |
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b06c46de |
| 29-Nov-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.1
Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (c
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.1
Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling
ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board
Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
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Revision tags: v2017.11 |
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c0823a76 |
| 10-Nov-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Move common ps7_init* initialization to arch code
This patch is based on work done in topic board where the first address word also storing operation which should be done. This is reducin
arm: zynq: Move common ps7_init* initialization to arch code
This patch is based on work done in topic board where the first address word also storing operation which should be done. This is reducing size of configuration data. This patch is not breaking an option to copy default ps7_init_gpl* files from hdf file but it is doing preparation for ps7_init* consolidation.
The patch is also marking ps7_config as weak function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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2d48caa4 |
| 30-Sep-2016 |
Mike Looijmans <mike.looijmans@topic.nl> |
ARM: zynq: Add support for the topic-miami system-on-modules and carrier boards
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM, 32MB QSPI NOR flash and 256MB NAND flash.
ARM: zynq: Add support for the topic-miami system-on-modules and carrier boards
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM, 32MB QSPI NOR flash and 256MB NAND flash.
The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC, 2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources and a fan controller.
The "Florida" carrier boards add SD, USB, ethernet and other interfaces.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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