History log of /openbmc/u-boot/board/freescale/common/qixis.h (Results 1 – 25 of 26)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07
# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.03, v2018.01, v2017.11, v2016.07, openbmc-20160624-1, v2016.01-rc1
# 5f5620ab 12-Nov-2015 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot


Revision tags: v2015.10, v2015.10-rc5, v2015.10-rc4
# bf50be83 16-Sep-2015 Yangbo Lu <yangbo.lu@freescale.com>

mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card

When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card),
enable EVDD automatic control via SDHC_VS. This coul

mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card

When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card),
enable EVDD automatic control via SDHC_VS. This could support SD card
IO voltage switching for UHS-1 speed mode.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# cdc69550 16-Sep-2015 Yangbo Lu <yangbo.lu@freescale.com>

mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card

If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.

Signed-off-by: Yangbo Lu <

mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card

If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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Revision tags: v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1
# d81572c2 05-May-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-mpc85xx


# 5a8dbdc6 22-Apr-2015 Yangbo Lu <yangbo.lu@freescale.com>

mmc: fsl_esdhc: Add adapter card type identification support

Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CON

mmc: fsl_esdhc: Add adapter card type identification support

Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun <yorksun@freescale.com>

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Revision tags: v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2, v2015.04-rc1, v2015.01, v2015.01-rc4
# 2c49323d 11-Dec-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


Revision tags: v2015.01-rc3
# 2565d18d 03-Dec-2014 Alison Wang <b18965@freescale.com>

ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro

Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is

ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro

Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is
more convenient for coding.

Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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Revision tags: v2015.01-rc2, v2015.01-rc1, v2014.10, v2014.10-rc3, v2014.10-rc2, v2014.10-rc1, v2014.07, v2014.07-rc4, v2014.07-rc3, v2014.07-rc2, v2014.07-rc1, v2014.04, v2014.04-rc3, v2014.04-rc2, v2014.04-rc1, v2014.01, v2014.01-rc3, v2014.01-rc2, v2014.01-rc1, v2013.10, v2013.10-rc4, v2013.10-rc3
# 7d436078 12-Sep-2013 Prabhakar Kushwaha <prabhakar@freescale.com>

powerpc/t1040qds: Add T1040QDS board

T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.

T1040QDS board Ove

powerpc/t1040qds: Add T1040QDS board

T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.

T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>

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Revision tags: v2013.10-rc2, v2013.10-rc1
# 326ea986 31-Jul-2013 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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# 8b485ba1 25-Jul-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into u-boot-arm/master


Revision tags: v2013.07, v2013.07-rc3
# 1a459660 08-Jul-2013 Wolfgang Denk <wd@denx.de>

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>


Revision tags: v2013.07-rc2, v2013.07-rc1
# a19b0dd6 30-May-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c


Revision tags: v2013.04, v2013.04-rc3, v2013.04-rc2
# 428ea86c 25-Mar-2013 Ed Swarthout <Ed.Swarthout@freescale.com>

powerpc/qixis: add clock measurement registers

QIXIS includes frequency measurement functions for each major processor
clock input. After reset (and after clocks are stable), QIXIS measures
the cloc

powerpc/qixis: add clock measurement registers

QIXIS includes frequency measurement functions for each major processor
clock input. After reset (and after clocks are stable), QIXIS measures
the clocks against a reference frequency and stores the results in
CLK_FREQ registers. A base register supplies a multiplier which allows
directly obtaining the measured value, without requiring knowledge of
the target system or QIXIS core frequency.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Revision tags: v2013.04-rc1
# 9cd9b34d 23-Feb-2013 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-arm


# 9a32084e 04-Feb-2013 Kim Phillips <kim.phillips@freescale.com>

Merge branch 'master' of git://git.denx.de/u-boot


Revision tags: v2013.01.01
# 960aa89b 23-Jan-2013 Prabhakar Kushwaha <prabhakar@freescale.com>

board/common: Add support for QIXIS read/write using i2c

QIXIS FPGA is accessable via both i2c and flash controller.
Only flash controller access is supported.

Add support of i2c based access. It i

board/common: Add support for QIXIS read/write using i2c

QIXIS FPGA is accessable via both i2c and flash controller.
Only flash controller access is supported.

Add support of i2c based access. It is quite useful in the scenario
where either flash controller path is broken or not present.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Revision tags: v2013.01, v2013.01-rc3
# c6cef92f 23-Dec-2012 Shaveta Leekha <shaveta@freescale.com>

powerpc/qixis: enable qixis dump command and add switch dumping command

Remove #ifdef so that "qixis dump" command is always available

Add "qixis_reset switch" command to dump switch settings
Qixis

powerpc/qixis: enable qixis dump command and add switch dumping command

Remove #ifdef so that "qixis dump" command is always available

Add "qixis_reset switch" command to dump switch settings
Qixis doesn't have 1:1 switch mapping. We need to reverse engineer from
registers to figure out switch settings. Not all bits are available.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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# 2ae4e8d9 23-Dec-2012 Prabhakar Kushwaha <prabhakar@freescale.com>

board/freescale/common:Add support of QTAG register

QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build dat

board/freescale/common:Add support of QTAG register

QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build date
information.

Add support to parse these fields to have complete FPGA image information.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Revision tags: v2013.01-rc2
# 3e4d27b0 10-Nov-2012 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot


Revision tags: v2013.01-rc1
# c7656bab 22-Oct-2012 Tom Rini <trini@ti.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx


Revision tags: v2012.10, v2012.10-rc3
# e4de13e3 07-Oct-2012 Shengzhou Liu <Shengzhou.Liu@freescale.com>

powerpc/board: add present2 register definition for QIXIS

According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.

Signed-off-by:

powerpc/board: add present2 register definition for QIXIS

According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Revision tags: v2012.10-rc2, v2012.10-rc1
# 9f26fd79 17-Sep-2012 Prabhakar Kushwaha <prabhakar@freescale.com>

board/freescale/common:QIXIS:Fix magic number usage

QIXIS FPGA layout defines the address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers a

board/freescale/common:QIXIS:Fix magic number usage

QIXIS FPGA layout defines the address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers as it may vary across different boards's QIXIS
FPGA implementation.
Also, Avoid board specific defines in common/qixis.h

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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Revision tags: v2012.07, v2012.07-rc3, v2012.07-rc2, v2012.07-rc1, v2012.04.01, v2012.04, v2012.04-rc3, v2012.04-rc2, v2012.04-rc1, v2011.12, v2011.12-rc3, v2011.12-rc2, v2011.12-rc1
# 7708d8b3 01-Dec-2011 Wolfgang Denk <wd@denx.de>

Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

* 'master' of ssh://gemini/home/wd/git/u-boot/master:
board/emk/top860/top860.c: Fix GCC 4.6 build warning
board/sbc405/strataflas

Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

* 'master' of ssh://gemini/home/wd/git/u-boot/master:
board/emk/top860/top860.c: Fix GCC 4.6 build warning
board/sbc405/strataflash.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warning
board/freescale/mpc8610hpcd/mpc8610hpcd.c: Fix GCC 4.6 build warning
board/mpl/common/flash.c: Fix GCC 4.6 build warning
post/board/lwmon5/gdc.c: Fix GCC 4.6 build warning
drivers/usb/host/sl811-hcd.c: Fix GCC 4.6 build warning
board/sandburst/common/flash.c: Fix GCC 4.6 build warning
DB64460: Fix GCC 4.6 build warnings
DB64360: Fix GCC 4.6 build warnings
board/cray/L1/flash.c: Fix GCC 4.6 build warning
drivers/block/sata_dwc.c: Fix GCC 4.6 build warning
board/amirix/ap1000/flash.c: Fix GCC 4.6 build warning
alpr board: Fix GCC 4.6 build warnings
image: Don't detect XIP images as overlapping.
image: Implement IH_TYPE_KERNEL_NOLOAD
ppc4xx: Add Io64 board support
ppc4xx: fix PMC440 painit command
ppc4xx: remove invalid access to PCI_BRDGOPT2 register
ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementation
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
mpc85xx: support board-specific reset function
powerpc/85xx: verify the localbus device tree address before booting the OS
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
powerpc/p3060qds: Add board related support for P3060QDS platform
powerpc/85xx: clean up and document the QE/FMAN microcode macros
powerpc/85xx: always implement the work-around for Erratum SATA_A001
powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
powerpc/85xx: Add workaround for erratum A-003474
powerpc/85xx: fixup flexcan device tree clock-frequency
powerpc/85xx: Add workaround for erratum CPU-A003999
x86: Fix some bugs in the i8402 driver when no controller is present
x86: Make the i8042 driver checkpatch clean
x86: Wrap small helper functions from libgcc to avoid an ABI mismatch
x86: Import the glibc memset implementation
x86: Fix a few recently added bugs
x86: Don't relocate symbols which point to things that aren't relocated
x86: Fix how the location of the realmode and bios blobs are calculated
x86: Misc cleanups
x86: Misc PCI touchups
x86: Ensure IDT and GDT remain 16-byte aligned post relocation
x86: Provide more configuration granularity
x86: Add multiboot header
sc520: Create arch asm-offsets
x86: Punt cold- and warm-boot flags
cosmetic: checkpatch cleanup of board/eNET/*.c
cosmetic: checkpatch cleanup of arch/x86/lib/*.c
cosmetic: checkpatch cleanup of arch/x86/cpu/sc520/*.c
cosmetic: checkpatch cleanup of arch/x86/cpu/*.c
x86: Call hang() on unrecoverable exception
menu.c: use puts() instead of printf() where possible
MAKEALL: drop obsolete mx31pdk_nand target
dataflash: fix parameters order in write_dataflash()
hawkboard: Replace HAWKBOARD_KICK{0, 1}_UNLOCK defines
davinci_sonata: define CONFIG_MACH_TYPE for davinci_sonata board
davinci_schmoogie: define CONFIG_MACH_TYPE for davinci_schmoogie board
arm: a320evb: define mach-type in board config file
OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning that.
Fix Stelian's email address
DIU: 1080P and 720P support
CFB: Fix font rendering on mx5 framebuffer

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# d51e6d6d 01-Dec-2011 Wolfgang Denk <wd@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactiv

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: support for Freescale COM Express P2020
arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
mpc85xx: support board-specific reset function
powerpc/85xx: verify the localbus device tree address before booting the OS
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
powerpc/p3060qds: Add board related support for P3060QDS platform
powerpc/85xx: clean up and document the QE/FMAN microcode macros
powerpc/85xx: always implement the work-around for Erratum SATA_A001
powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
powerpc/85xx: Add workaround for erratum A-003474
powerpc/85xx: fixup flexcan device tree clock-frequency
powerpc/85xx: Add workaround for erratum CPU-A003999

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