History log of /openbmc/u-boot/arch/x86/cpu/queensbay/tnc.c (Results 1 – 25 of 41)
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# 66398944 13-Jun-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# bc728b1b 03-Jun-2018 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these ar

x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.03, v2018.01, v2017.11
# 433647a7 05-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# 706865af 20-Mar-2017 Stefan Roese <sr@denx.de>

dm: core: Add flags parameter to device_remove()

This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "n

dm: core: Add flags parameter to device_remove()

This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>

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# 0a8547a2 06-Sep-2016 Masahiro Yamada <yamada.masahiro@socionext.com>

x86: squash lines for immediate return

arch_cpu_init() can be simpler by this refactoring.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

x86: squash lines for immediate return

arch_cpu_init() can be simpler by this refactoring.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Revision tags: v2016.07, openbmc-20160624-1
# 66484f0f 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: tnc: Remove IGD and SDVO devices from driver model

With recent DM PCI changes to vesa_fb driver, external graphics
card does not work any more. This is because: after setting the
function disab

x86: tnc: Remove IGD and SDVO devices from driver model

With recent DM PCI changes to vesa_fb driver, external graphics
card does not work any more. This is because: after setting the
function disable bit, IGD and SDVO devices will disappear in the
PCI configuration space. This however creates an inconsistent state
from a driver model PCI controller point of view, as these two PCI
devices are still attached to its parent's child device list as
maintained by the driver model. Some driver model PCI APIs like
dm_pci_find_class() used in the vesa_fb driver, are referring to
the list to speed up the finding process instead of re-enumerating
the whole PCI bus, so it gets the stale cached data which is wrong.

To fix this, manually remove these two devices.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 2b94d9fc 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: tnc: Use DM PCI API in disable_igd()

Once we get udevice of IGD and SDVO, we can use its udevice to
access PCI configuration space with dm_pci_write_config32().

Signed-off-by: Bin Meng <bmeng.

x86: tnc: Use DM PCI API in disable_igd()

Once we get udevice of IGD and SDVO, we can use its udevice to
access PCI configuration space with dm_pci_write_config32().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 9e36c53d 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: tnc: Change disable_igd() to have a return value

So far disable_igd() does not have any return value, but we may need
that in the future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-

x86: tnc: Change disable_igd() to have a return value

So far disable_igd() does not have any return value, but we may need
that in the future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# efd633cc 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: tnc: Drop unprotect_spi_flash()

Unprotecting SPI flash is now handled in the SPI controller driver,
via a call to the PCH driver. Drop the ad-hoc version.

Signed-off-by: Bin Meng <bmeng.cn@gma

x86: tnc: Drop unprotect_spi_flash()

Unprotecting SPI flash is now handled in the SPI controller driver,
via a call to the PCH driver. Drop the ad-hoc version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 0ac8b1f4 19-Jan-2016 Simon Glass <sjg@chromium.org>

dm: x86: queensbay: Add an interrupt driver

Add a driver for interrupts on queensbay and move the code currently in
cpu_irq_init() into its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.

dm: x86: queensbay: Add an interrupt driver

Add a driver for interrupts on queensbay and move the code currently in
cpu_irq_init() into its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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# 12d6929e 19-Jan-2016 Simon Glass <sjg@chromium.org>

dm: x86: Set up interrupt routing from interrupt_init()

At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().

This removes the manu

dm: x86: Set up interrupt routing from interrupt_init()

At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().

This removes the manual pirq_init() call. Where the platform does not have
an interrupt router defined in its device tree, no error is generated. Some
platforms do not have this.

Drop pirq_init() since it is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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Revision tags: v2016.01-rc1
# 80af3984 13-Nov-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Convert to use driver model timer

Convert all x86 boards to use driver model tsc timer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>


# b67dfc5a 13-Nov-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# e5ffa4bb 22-Oct-2015 Bin Meng <bmeng.cn@gmail.com>

x86: queensbay: Really disable IGD

According to Atom E6xx datasheet, setting VGA Disable (bit17)
of Graphics Controller register (offset 0x50) prevents IGD
(D2:F0) from reporting itself as a VGA dis

x86: queensbay: Really disable IGD

According to Atom E6xx datasheet, setting VGA Disable (bit17)
of Graphics Controller register (offset 0x50) prevents IGD
(D2:F0) from reporting itself as a VGA display controller
class in the PCI configuration space, and should also prevent
it from responding to VGA legacy memory range and I/O addresses.

However test result shows that with just VGA Disable bit set and
a PCIe graphics card connected to one of the PCIe controllers on
the E6xx, accessing the VGA legacy space still causes system hang.
After a number of attempts, it turns out besides VGA Disable bit,
the SDVO (D3:F0) device should be disabled to make it work.

To simplify, use the Function Disable register (offset 0xc4)
to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these
two devices will be completely disabled (invisible in the PCI
configuration space) unless a system reset is performed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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# a69fdc77 23-Oct-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 858dbdf8 21-Oct-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


Revision tags: v2015.10, v2015.10-rc5
# 1f124eba 01-Oct-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Allow disabling IGD on Intel Queensbay

Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller.

x86: Allow disabling IGD on Intel Queensbay

Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Revision tags: v2015.10-rc4, v2015.10-rc3
# 79c884d7 26-Aug-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 090290f9 20-Aug-2015 Bin Meng <bmeng.cn@gmail.com>

x86: queensbay: Move unprotect_spi_flash() to arch_misc_init()

With dm pci conversion, pci config read/write in unprotect_spi_flash()
silently fails as at that time dm pci is not ready and bus enume

x86: queensbay: Move unprotect_spi_flash() to arch_misc_init()

With dm pci conversion, pci config read/write in unprotect_spi_flash()
silently fails as at that time dm pci is not ready and bus enumeration
is not done yet. Actually we don't need to do this in that early phase,
hence we delay this call to arch_misc_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Revision tags: v2015.10-rc2
# 632093b5 14-Aug-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 7e4be120 10-Aug-2015 Simon Glass <sjg@chromium.org>

x86: Allow pirq_init() to return an error

This function can fail. In this case we should return the error rather than
swallowing it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin M

x86: Allow pirq_init() to return an error

This function can fail. In this case we should return the error rather than
swallowing it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

show more ...


Revision tags: v2015.10-rc1
# a2771943 18-Jul-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Convert to use driver model pci on queensbay/crownbay

Move to driver model pci for Intel queensbay/crownbay.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>


# f448c5d3 17-Jul-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 605e15db 15-Jul-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


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