Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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3d5ced9e |
| 10-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dm
Test improvements to tidy up output and drop duplicate tests Sandbox SPL/TPL support Various dm-related improvements
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590cee83 |
| 01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
x86: Update mtrr functions to allow leaving cache alone
At present the mtrr functions disable the cache before making changes and enable it again afterwards. This is fine in U-Boot, but does not wor
x86: Update mtrr functions to allow leaving cache alone
At present the mtrr functions disable the cache before making changes and enable it again afterwards. This is fine in U-Boot, but does not work if running in CAR (such as we are in SPL).
Update the functions so that the caller can request that caches be left alone.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Revision tags: v2018.07 |
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Revision tags: v2018.03, v2018.01, v2017.11, v2016.07, openbmc-20160624-1, v2016.01-rc1, v2015.10, v2015.10-rc5, v2015.10-rc4, v2015.10-rc3, v2015.10-rc2, v2015.10-rc1, v2015.07, v2015.07-rc3, v2015.07-rc2, v2015.07-rc1, v2015.04, v2015.04-rc5, v2015.04-rc4, v2015.04-rc3, v2015.04-rc2 |
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e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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Revision tags: v2015.04-rc1 |
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ab92da9f |
| 26-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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3b621cca |
| 21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessi
x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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566d1754 |
| 21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.c
arch/x86/cpu/mtrr.c has access to the U-Boot global data thus DECLARE_GLOBAL_DATA_PTR is needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Ack
x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.c
arch/x86/cpu/mtrr.c has access to the U-Boot global data thus DECLARE_GLOBAL_DATA_PTR is needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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5f88ed5c |
| 13-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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Revision tags: v2015.01 |
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aff2523f |
| 01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for MTRRs
Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use.
Clean up the existing header file to follow style,
x86: Add support for MTRRs
Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use.
Clean up the existing header file to follow style, and remove the unneeded code.
These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit).
Signed-off-by: Simon Glass <sjg@chromium.org>
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