History log of /openbmc/u-boot/arch/x86/cpu/irq.c (Results 1 – 25 of 38)
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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04, v2018.07
# 66398944 13-Jun-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 51050ff0 12-Jun-2018 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Support discrete PIRQ routing registers via device tree

Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not alwa

x86: irq: Support discrete PIRQ routing registers via device tree

Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not always
the case on some platforms. Introduce a new device tree property
intel,pirq-regmap to describe how the PIRQ routing register offset
is mapped to the link number and adjust the irq router driver to
utilize the mapping.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# dcec5d56 12-Jun-2018 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Parse number of PIRQ links from device tree

The "intel,pirq-link" property in Intel IRQ router's dt bindings
has two cells, where the second one represents the number of PIRQ
links on the

x86: irq: Parse number of PIRQ links from device tree

The "intel,pirq-link" property in Intel IRQ router's dt bindings
has two cells, where the second one represents the number of PIRQ
links on the platform. However current driver does not parse this
information from device tree. This adds the codes to do the parse
and save it for future use.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 594d089c 03-Jun-2018 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Change LINK_V2N and LINK_N2V to inline functions

LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed

x86: irq: Change LINK_V2N and LINK_N2V to inline functions

LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# bc728b1b 03-Jun-2018 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these ar

x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Revision tags: v2018.03, v2018.01, v2017.11
# 21342d4a 08-Feb-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# e160f7d4 17-Jan-2017 Simon Glass <sjg@chromium.org>

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree,

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

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# 63767071 18-Jan-2017 Bin Meng <bmeng.cn@gmail.com>

x86: qemu: Fix compiler warnings for 64-bit

This fixes compiler warnings for QEMU in 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# 1bff8363 16-Jan-2017 Simon Glass <sjg@chromium.org>

x86: Move pirq_routing_table to global_data

To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bm

x86: Move pirq_routing_table to global_data

To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 42fd8c19 16-Jan-2017 Simon Glass <sjg@chromium.org>

x86: Use unsigned long for address in table generation

We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.

x86: Use unsigned long for address in table generation

We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 4504062b 13-Oct-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fdt


# b02e4044 02-Oct-2016 Simon Glass <sjg@chromium.org>

libfdt: Bring in upstream stringlist functions

These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.

This applies the

libfdt: Bring in upstream stringlist functions

These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.

This applies the following upstream commits by
Thierry Reding <treding@nvidia.com> :

604e61e fdt: Add functions to retrieve strings
8702bd1 fdt: Add a function to get the index of a string
2218387 fdt: Add a function to count strings

Signed-off-by: Simon Glass <sjg@chromium.org>

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Revision tags: v2016.07, openbmc-20160624-1
# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 6d54868e 23-May-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# 10d569ea 11-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: Fix up PIRQ routing table checksum earlier

PIRQ routing table checksum is fixed up in copy_pirq_routing_table(),
which is fine if we only write the configuration table once. But with
the SeaBIO

x86: Fix up PIRQ routing table checksum earlier

PIRQ routing table checksum is fixed up in copy_pirq_routing_table(),
which is fine if we only write the configuration table once. But with
the SeaBIOS case, when we write the table for the second time, the
checksum will be fixed up to zero per the checksum algorithm, which
is caused by the checksum field not being zero before fix up, since
the checksum has already been calculated in the first run.

To fix this, move the checksum fixup to create_pirq_routing_table(),
so that copy_pirq_routing_table() only does what its function name
suggests: copy the table to somewhere else.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# d4e61f50 07-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Enable SCI on IRQ9

By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to

x86: irq: Enable SCI on IRQ9

By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>

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# 07ac84ea 07-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Reserve IRQ9 for ACPI in PIC mode

Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr

x86: irq: Reserve IRQ9 for ACPI in PIC mode

Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 248c4faa 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Convert to use DM PCI API

Now that we have irq router's udevice passed as a parameter, it's
time to start using the DM PCI API instead of those legacy ones.

Signed-off-by: Bin Meng <bmeng

x86: irq: Convert to use DM PCI API

Now that we have irq router's udevice passed as a parameter, it's
time to start using the DM PCI API instead of those legacy ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# b46c2088 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Move irq_router to a per driver priv

At present irq_router is declared as a static struct irq_router in
arch/x86/cpu/irq.c. Since it's a driver control block, it makes sense
to move it to

x86: irq: Move irq_router to a per driver priv

At present irq_router is declared as a static struct irq_router in
arch/x86/cpu/irq.c. Since it's a driver control block, it makes sense
to move it to a per driver priv. Adjust existing APIs to accept an
additional parameter of irq_router's udevice.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 819133d9 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: irq: Get irq_router's bdf via dm_pci_get_bdf()

There is no need to parse PCH's <reg> property as we have already
a DM PCI API dm_pci_get_bdf() that can handle this.

Signed-off-by: Bin Meng <bm

x86: irq: Get irq_router's bdf via dm_pci_get_bdf()

There is no need to parse PCH's <reg> property as we have already
a DM PCI API dm_pci_get_bdf() that can handle this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 0bdce075 19-Jan-2016 Simon Glass <sjg@chromium.org>

dm: x86: Drop the weak cpu_irq_init() function

There are no callers now. Platforms which need to set up interrupts their
own way can implement an interrupt driver. Drop this function.

Signed-off-by

dm: x86: Drop the weak cpu_irq_init() function

There are no callers now. Platforms which need to set up interrupts their
own way can implement an interrupt driver. Drop this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# b565d66d 19-Jan-2016 Simon Glass <sjg@chromium.org>

x86: Use the IRQ device when setting up the mptable

Instead of searching for the device tree node, use the IRQ device which has
a record of it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewe

x86: Use the IRQ device when setting up the mptable

Instead of searching for the device tree node, use the IRQ device which has
a record of it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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# d3b884b2 19-Jan-2016 Simon Glass <sjg@chromium.org>

dm: x86: Add a common PIRQ init function

Most x86 interrupt drivers will want to use the standard PIRQ routing and
table setup. Put this code in a common function so it can be used by those
drivers

dm: x86: Add a common PIRQ init function

Most x86 interrupt drivers will want to use the standard PIRQ routing and
table setup. Put this code in a common function so it can be used by those
drivers that want it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 12d6929e 19-Jan-2016 Simon Glass <sjg@chromium.org>

dm: x86: Set up interrupt routing from interrupt_init()

At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().

This removes the manu

dm: x86: Set up interrupt routing from interrupt_init()

At present interrupt routing is set up from arch_misc_init(). We can do it
a little later instead, in interrupt_init().

This removes the manual pirq_init() call. Where the platform does not have
an interrupt router defined in its device tree, no error is generated. Some
platforms do not have this.

Drop pirq_init() since it is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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