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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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328e3f8a |
| 21-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-riscv
- Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
- Support SiFive UART
- Rename ax25-ae350 defconfig
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511107d8 |
| 12-Dec-2018 |
Anup Patel <anup@brainfault.org> |
riscv: Implement riscv_get_time() API using rdtime instruction
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.
This is the case for S-mode U-Boot, and is usefu
riscv: Implement riscv_get_time() API using rdtime instruction
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.
This is the case for S-mode U-Boot, and is useful for processors
that support rdtime in M-mode too.
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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