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Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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328e3f8a |
| 21-Dec-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-riscv
- Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
- Support SiFive UART
- Rename ax25-ae350 defconfig
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| #
485e8223 |
| 12-Dec-2018 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: Do some basic architecture level cpu initialization
In arch_cpu_init_dm() do some basic architecture level cpu
initialization, like FPU enable, etc.
Signed-off-by: Bin Meng <bmeng.cn@gmail.c
riscv: Do some basic architecture level cpu initialization
In arch_cpu_init_dm() do some basic architecture level cpu
initialization, like FPU enable, etc.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
show more ...
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| #
aef59e5c |
| 12-Dec-2018 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: Update supports_extension() to use desc from cpu driver
This updates supports_extension() implementation to use the desc
string from the cpu driver whenever possible, which avoids the
reading
riscv: Update supports_extension() to use desc from cpu driver
This updates supports_extension() implementation to use the desc
string from the cpu driver whenever possible, which avoids the
reading of misa CSR for S-mode U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
show more ...
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| #
3c276b27 |
| 12-Dec-2018 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: Remove non-DM version of print_cpuinfo()
With DM CPU driver, the non-DM version of print_cpuinfo() is no
longer needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <
riscv: Remove non-DM version of print_cpuinfo()
With DM CPU driver, the non-DM version of print_cpuinfo() is no
longer needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
show more ...
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| #
39cad5bc |
| 12-Dec-2018 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: Probe cpus during boot
This calls cpu_probe_all() to probe all available cpus.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-
riscv: Probe cpus during boot
This calls cpu_probe_all() to probe all available cpus.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
show more ...
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| #
ef0b75d3 |
| 26-Nov-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-riscv
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| #
5d8b2e77 |
| 22-Nov-2018 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
riscv: save hart ID and device tree passed by prior boot stage
Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.
riscv: save hart ID and device tree passed by prior boot stage
Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.S to
avoid overwriting it.
The device tree is also stored in memory to make it available to U-Boot
with the configuration CONFIG_OF_PRIOR_STAGE.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
show more ...
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| #
94228a91 |
| 03-Oct-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-riscv
- QEMU support
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| #
2fab2e9c |
| 26-Sep-2018 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: Add a helper routine to print CPU information
This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.
Si
riscv: Add a helper routine to print CPU information
This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
show more ...
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