SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework

Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes

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arm: zynq: Update years in copyright to reflect latest changes

Updating year in zynq files. Also add missing Copyright to board.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (c

Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling

ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board

Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support

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arm: zynq: Use unsigned type with comparison with ARRAY_SIZE

Sparse is return warning about this:
arch/arm/mach-zynq/slcr.c: In function 'zynq_slcr_get_mio_pin_status':
arch/arm/mach-zynq/slcr.c:185

arm: zynq: Use unsigned type with comparison with ARRAY_SIZE

Sparse is return warning about this:
arch/arm/mach-zynq/slcr.c: In function 'zynq_slcr_get_mio_pin_status':
arch/arm/mach-zynq/slcr.c:185:16: warning: comparison between signed and
unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(mio_periphs); i++) {
^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.05

- Move to DM clk driver
- Add clk support for zynq_sdhci

zynq: Move zynq to clock framework

Move the zynq to clock framework and remove unused functions as well as
the CONFIG_ZYNQ_PS_CLK_FREQ configuration.

Signed-off-by: Stefan Herbrechtsmeier <stefan.h

zynq: Move zynq to clock framework

Move the zynq to clock framework and remove unused functions as well as
the CONFIG_ZYNQ_PS_CLK_FREQ configuration.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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net: zynq: Don't overwrite gem_rclk_ctrl with default value

The gem[0-1]_rclk_ctrl registers control the source of the rx clock,
control and data signals and configure via ps7_init function. Don't
o

net: zynq: Don't overwrite gem_rclk_ctrl with default value

The gem[0-1]_rclk_ctrl registers control the source of the rx clock,
control and data signals and configure via ps7_init function. Don't
overwrite the register with the default value.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

zynq: nand: Runtime detection of nand buswidth through slcr

This patch adds support to check the buswidth on nand flash
at runtime based on nand MIO configurations done by FSBL.

User needs to corre

zynq: nand: Runtime detection of nand buswidth through slcr

This patch adds support to check the buswidth on nand flash
at runtime based on nand MIO configurations done by FSBL.

User needs to correctly configure the MIO's based on the
buswidth supported by the nand flash which is present on the board.

Added nand8 and nand16 @periph names on slcr driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'u-boot/master' into 'u-boot-arm/master'

Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze

ARM: zynq: move SoC sources to mach-zynq

Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.si

ARM: zynq: move SoC sources to mach-zynq

Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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