Merge branch 'master' of git://git.denx.de/u-boot-socfpga

ARM: socfpga: Reorder Arria10 SPL

The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that me

ARM: socfpga: Reorder Arria10 SPL

The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.

The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

ARM: socfpga: Assure correct CPACR configuration

Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.li

ARM: socfpga: Assure correct CPACR configuration

Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c

Signed-off-by: Tom Rini <trini@konsulko.com>

arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only

MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.

Signed-off-by: Ley Foon Tan <ley.

arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only

MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

show more ...

ARM: socfpga: Assure correct ACTLR configuration

Make sure the ARM ACTLR register has correct configuration, otherwise
the Linux kernel refuses to boot. In particular, the "Write Full Line
of Zeroes

ARM: socfpga: Assure correct ACTLR configuration

Make sure the ARM ACTLR register has correct configuration, otherwise
the Linux kernel refuses to boot. In particular, the "Write Full Line
of Zeroes" bit must be cleared.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot

SoC FPGA info is required in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

ARM: socfpga: Adding clock frequency info for U-Boot

Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.

Signed-off-by: Tien Fong Chee <tien.

ARM: socfpga: Adding clock frequency info for U-Boot

Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

show more ...

ARM: socfpga: Add DRAM bank size initialization function

Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SO

ARM: socfpga: Add DRAM bank size initialization function

Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>

show more ...

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

show more ...

Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga

arm: socfpga: Introduce common board code

The SoCFPGA has reached a point where every single board code become
the same, since each and every single board is probed equally from OF.
Move the common

arm: socfpga: Introduce common board code

The SoCFPGA has reached a point where every single board code become
the same, since each and every single board is probed equally from OF.
Move the common board code into arch/arm/mach-socfpga/ .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

show more ...