History log of /openbmc/u-boot/arch/arm/include/asm/arch-aspeed/scu_ast2500.h (Results 1 – 23 of 23)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11
# 43e9f5a6 03-May-2022 Zev Weiss <zev@bewilderbeest.net>

aspeed: Disable backdoor interfaces

On ast2400 and ast2500 we now disable the various hardware backdoor
interfaces as is done on ast2600. Two Kconfig options can selectively
re-enable some of these

aspeed: Disable backdoor interfaces

On ast2400 and ast2500 we now disable the various hardware backdoor
interfaces as is done on ast2600. Two Kconfig options can selectively
re-enable some of these interfaces: CONFIG_ASPEED_ENABLE_SUPERIO
leaves the ast2x00 built-in Super I/O device enabled, as it is
required for some systems, and CONFIG_ASPEED_ENABLE_DEBUG_UART leaves
the hardware debug UART enabled, since it provides a relatively high
ratio of utility to security risk during development.

This patch is based on a patch by Andrew Jeffery for an older u-boot
branch in the OpenBMC tree for the df-isolate-bmc distro feature flag.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Tested-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220504004739.15829-1-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>

show more ...


Revision tags: v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01
# baa29d5e 18-Jul-2019 Johnny Huang <johnny_huang@aspeedtech.com>

Merge remote-tracking branch 'origin/aspeed-dev-v2019.04' into aspeed-master-v2019.04


Revision tags: v2019.07
# 369186fa 13-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# d35ac78c 13-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

update clk info for ast2500/ast2600


Revision tags: v00.02.00
# 9da3b6f0 13-Jun-2019 Johnny Huang <johnny_huang@aspeedtech.com>

Merge branch 'aspeed-dev-v2019.04' into aspeed-master-v2019.04


# afbe1ac3 12-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# d812df15 12-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

update


# ac509baf 09-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# 4f22e838 06-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

mv clk info to cpuinfo


# f5639407 06-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

modify for mac clk


# e7135dfc 05-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

Merge branch 'ryan_port' into aspeed-dev-v2019.04


# 39283ea7 05-Jun-2019 ryan_chen <ryan_chen@aspeedtech.com>

update for reset and clk


# 74b5eb38 22-May-2019 Dylan Hung <dylan_hung@aspeedtech.com>

Merge branch 'fix_2500_build_err' into aspeed-dev-v2019.04


# 5e0c8877 22-May-2019 Dylan Hung <dylan_hung@aspeedtech.com>

[fix] fix 2500 compile error.

1. add platform.S for ast2500
2. remove ast_scu_unlock since the SCU had been unlocked at the
begining of lowlevel_init in platform.S
3. rename clk driver


Revision tags: v2019.04, v2018.07
# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

show more ...


Revision tags: v2018.03, v2018.01, v2017.11
# 4f66e09b 09-May-2017 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# defb1849 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: Refactor SCU to use consistent mask & shift

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shi

aspeed: Refactor SCU to use consistent mask & shift

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 3b95902d 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: Add support for Clocks needed by MACs

Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 an

aspeed: Add support for Clocks needed by MACs

Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.

The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.

The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.

So, the network driver would only need to enable these clocks, no need
to configure the rate.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 4999bb06 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: Add P-Bus clock in ast2500 clock driver

Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by:

aspeed: Add P-Bus clock in ast2500 clock driver

Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 4f0e44e4 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: AST2500 Pinctrl Driver

This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.

Not all pins are supported

aspeed: AST2500 Pinctrl Driver

This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.

Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 858d4976 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: Reset Driver

Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree

aspeed: Reset Driver

Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:

rst: reset-controller {
compatible = "aspeed,ast2500-reset";
aspeed,wdt = <&wdt1>;
}

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 413353b3 17-Apr-2017 maxims@google.com <maxims@google.com>

aspeed: Make SCU lock/unlock functions part of SCU API

Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. Thi

aspeed: Make SCU lock/unlock functions part of SCU API

Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...


# 14e4b149 18-Jan-2017 maxims@google.com <maxims@google.com>

aspeed: Add basic ast2500-specific drivers and configuration

Clock Driver

This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big,

aspeed: Add basic ast2500-specific drivers and configuration

Clock Driver

This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.

SDRAM MC driver

The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.

The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>

show more ...