Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
|
#
d391c13c |
| 15-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac add
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2
xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac addr eeprom read to common location - Convert to OF_SEPARATE - Switch all board to DM_I2C - Some DT syncs
i2c: - Remove !DM_I2C zynq driver
versal: - Enable some more features - Add mini configurations
show more ...
|
#
9896dc65 |
| 11-Jul-2018 |
Luis Araneda <luaraneda@gmail.com> |
ARM: dts: zynq: correct and improve the model property of dt files
Replace the current value of the model property by a more accurate description of each board (which includes the manufacturer), as
ARM: dts: zynq: correct and improve the model property of dt files
Replace the current value of the model property by a more accurate description of each board (which includes the manufacturer), as some of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|
Revision tags: v2018.07 |
|
#
2600df4f |
| 09-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL i
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL init for zcu102 revA - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX and zc1751-dc3 - Net fixes - xlnx,phy-type - 64bit axi ethernet support - arasan: Fix nand write issue - fpga fixes - Maintainer file updates
show more ...
|
#
051a8ad7 |
| 27-Mar-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Sync up licenses with mainline kernel
Use different location for SPDX line. Also update dates for new mainline DTS files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
03bc69de |
| 27-Mar-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Remove 0x prefixes from cc108
The patch fixing issues reported by DTC: zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x400000 unit name should n
arm: zynq: Remove 0x prefixes from cc108
The patch fixing issues reported by DTC: zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have leading "0x" zynq-cc108.dtb: Warning (unit_address_format): Node /amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have leading "0x"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|
Revision tags: v2018.03 |
|
#
ab21ecef |
| 31-Jan-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates - ZynqMP psu rework
Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs) - Some DTS updates - ZynqMP psu rework based on Zynq concept - Add low level initialization for zc770 and zcu102 - Add support for Zynq zc770 x16 nand configuration - Add mini nand/emmc ZynqMP targets - Some arasan nand changes
show more ...
|
#
d78b4ae0 |
| 17-Jan-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Mark cc108 uart to be initialized before relocation
The same change is done for others zynq boards to get uart as early as possible.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
Revision tags: v2018.01 |
|
#
b06c46de |
| 29-Nov-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.1
Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (c
Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.1
Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling
ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board
Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support
show more ...
|
Revision tags: v2017.11 |
|
#
bc133e80 |
| 02-Nov-2017 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynq: Add board support for cc108
cc108 board is wiring uart via PL which is good platform for SPL fpga support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass
arm: zynq: Add board support for cc108
cc108 board is wiring uart via PL which is good platform for SPL fpga support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|