clang-format: update latest spec and reformat

Copy the latest format file from the docs repository and apply.

Change-Id: I1ece44942d482015c870eb78f9f386e5487a963f
Signed-off-by: Patrick Williams <p

clang-format: update latest spec and reformat

Copy the latest format file from the docs repository and apply.

Change-Id: I1ece44942d482015c870eb78f9f386e5487a963f
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda forma

clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda formatting also changed, so we have made changes to the
organization default style format to better handle lambda formatting.

See I5e08687e696dd240402a2780158664b7113def0e for updated style.
See Iea0776aaa7edd483fa395e23de25ebf5a6288f71 for clang-18 enablement.

Change-Id: I1210c7b95e65a82cc5675ada03441af6727a3930
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://githu

Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://github.com/codespell-project/codespell

Change-Id: Ifde736cdcf3ccca19b9e65afac69018628a19631
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M.

Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>

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sst: Don't always wake idle CPU

Some parts of SST are important (initial discovery, appliedConfig
change) and should use wake-on-PECI to ensure success even if the CPU is
in an idle PkgC state. Othe

sst: Don't always wake idle CPU

Some parts of SST are important (initial discovery, appliedConfig
change) and should use wake-on-PECI to ensure success even if the CPU is
in an idle PkgC state. Other parts are not important enough to justify
increasing the CPU power draw. Add a WakePolicy parameter to the
SSTInterface infrastructure to use a different policy in different
contexts.

Change-Id: I91435cc0357ab60ca4656e1bc51286e046ae3809
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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sst: Initialize OsMailboxCommand status

Static analyzer raised an issue on this unitialized member. It's not an
issue in current usage of the struct, but in theory the success()
function would have

sst: Initialize OsMailboxCommand status

Static analyzer raised an issue on this unitialized member. It's not an
issue in current usage of the struct, but in theory the success()
function would have UB for OsMailboxCommands created with a Throw error
policy.

Change-Id: I16650173add98efecc96535f30c90132481cf231
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: I172b14c1a881c734851b7dc6e0e90ee2e11cce03
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Add EMR support

EMR was not accounted for in the main cpuinfoapp check, nor in the check
for SST control support.

Tested: Verified Model and ProtectedIdentificationNumber were populated
under /redf

Add EMR support

EMR was not accounted for in the main cpuinfoapp check, nor in the check
for SST control support.

Tested: Verified Model and ProtectedIdentificationNumber were populated
under /redfish/v1/Systems/system/Processors/cpu0 for an EMR CPU.

Change-Id: I28bccc0f038384fb364245fa62eb4dae466fc795
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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sst: Add emr support in sst_mailbox backend

Change-Id: I1192c61827dc573bc0a13cb81a164e37ccb78ca9
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

sst: Prefer cached values over default values

In anticipation of support for future CPUs, change some assumptions:
* When host is off, return cached property values instead of "default"
values. CP

sst: Prefer cached values over default values

In anticipation of support for future CPUs, change some assumptions:
* When host is off, return cached property values instead of "default"
values. CPUs may not guarantee support for level 0, so there is no
universal default.
* Must always check the backend interface is ready before using it.
* Rename numLevels() to maxLevel() since there may be discontinuities in
the supported levels.
* Also add some more debug prints.

Tested:
* On CPU that supports level 0 - verified that output of sst-info.sh
script was the same before and after these changes.
* On a CPU that only supports level 4 - verified that when host was
powered off, the AppliedConfig showed config4 (valid) instead of
config0 (invalid).

Change-Id: Idffcb9a6534ba32760f6d6b2ac244f47427995ea
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Refactor SST host processor interface

In order to support future host processors that use a different
interface to SST, separate the SST logic into 1) high-level discovery
logic + D-Bus interfaces,

Refactor SST host processor interface

In order to support future host processors that use a different
interface to SST, separate the SST logic into 1) high-level discovery
logic + D-Bus interfaces, and 2) low-level backend processor interface.

This is a pure refactor with no functional change.

Tested:
Ran sst-compare-redfish-os.py tool on platform with SPR host CPU, and
verified no mismatches reported.
Used sst-info.sh to change configs and verify new config was reflected
in Redfish.

Change-Id: I6825eb7541cbe2214844e7b64d462f2688dedcec
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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