Fix build issues with boost 1.87

Update deprecated terminology that was removed in boost 1.87.

Change-Id: I175189edad0a9b6ea350d879771b7ec42b95a6d6
Signed-off-by: Jason M. Bills <jason.m.bills@linu

Fix build issues with boost 1.87

Update deprecated terminology that was removed in boost 1.87.

Change-Id: I175189edad0a9b6ea350d879771b7ec42b95a6d6
Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>

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clang-format: update latest spec and reformat

Copy the latest format file from the docs repository and apply.

Change-Id: I1ece44942d482015c870eb78f9f386e5487a963f
Signed-off-by: Patrick Williams <p

clang-format: update latest spec and reformat

Copy the latest format file from the docs repository and apply.

Change-Id: I1ece44942d482015c870eb78f9f386e5487a963f
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda forma

clang-format: re-format for clang-18

clang-format-18 isn't compatible with the clang-format-17 output, so we
need to reformat the code with the latest version. The way clang-18
handles lambda formatting also changed, so we have made changes to the
organization default style format to better handle lambda formatting.

See I5e08687e696dd240402a2780158664b7113def0e for updated style.
See Iea0776aaa7edd483fa395e23de25ebf5a6288f71 for clang-18 enablement.

Change-Id: I1210c7b95e65a82cc5675ada03441af6727a3930
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://githu

Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://github.com/codespell-project/codespell

Change-Id: Ifde736cdcf3ccca19b9e65afac69018628a19631
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M.

Use the new CPUModel enum names from libpeci

libpeci was updated with new CPUModel names, so update uses here to
match.

Change-Id: I60db4ea624bdb8defe3d937cc48fb798e5f49207
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>

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cpuinfoapp: Make PECI features optional

Add a feature flag `cpuinfo-peci` to optionally disable the features in
cpuinfoapp that rely on PECI (PPIN, SST), to support configurations that
want I2C-base

cpuinfoapp: Make PECI features optional

Add a feature flag `cpuinfo-peci` to optionally disable the features in
cpuinfoapp that rely on PECI (PPIN, SST), to support configurations that
want I2C-based SSPEC detection but don't want to use libpeci.

Tested: Disabled `cpuinfo-peci` and verified SSPEC was still written
into the Model property.

Change-Id: Ie3ab9214d9d6ab238a61933de3e3856eca298fa8
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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clang-format: copy latest and re-format

clang-format-17 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-17 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: Ib52f953657f0c75fcf0ea191a7eadfbd8b94c917
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Fix compilation warnings

Various small issues:
* Member initialization order
* Comparison of different signedness
* Unused parameters
* Unused variable

Change-Id: Ie59db239b4216ad089f7cf0f289e6ed3d

Fix compilation warnings

Various small issues:
* Member initialization order
* Comparison of different signedness
* Unused parameters
* Unused variable

Change-Id: Ie59db239b4216ad089f7cf0f289e6ed3d6ac8e18
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Add GNR-D to cpuinfoapp support

Change-Id: Ia9ee31ef4a5cb7d6677a0ec726345a57205c1108
Signed-off-by: Saitwal, Meghan <meghan.saitwal@intel.com>

Clear cpuInfoMap on platform config discovery

UniqueIdentifier D-Bus interface from cpuInfo (struct) was not
getting removed from dbus on platform configuration discovery.

Later as CPUInfo object g

Clear cpuInfoMap on platform config discovery

UniqueIdentifier D-Bus interface from cpuInfo (struct) was not
getting removed from dbus on platform configuration discovery.

Later as CPUInfo object gets reconstructed for same UniqueIdentifier interface throws exception since interface is still there followed shortly by a crash:

terminate called after throwing an instance of 'sdbusplus::exception::SdBusError'
what(): sd_bus_add_object_vtable: org.freedesktop.DBus.Error.FileExists: File exists

With this change in place, cpuinfoapp runs smoothly across a host reboot/entity-manager restart.

Change-Id: I470afd3d7cba4285470e7bdf66b617a18c8bfbf1
Signed-off-by: Ankita Vilas Gawade <ankita.gawade@intel.com>

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clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: I172b14c1a881c734851b7dc6e0e90ee2e11cce03
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Add GNR and SRF to cpuinfoapp support

They do support same PCS and PIROM interfaces as previous generations.

Change-Id: Ib30df04dff9cd9506a193589234f1d52c76a022a
Signed-off-by: Jonathan Doman <jona

Add GNR and SRF to cpuinfoapp support

They do support same PCS and PIROM interfaces as previous generations.

Change-Id: Ib30df04dff9cd9506a193589234f1d52c76a022a
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Add EMR support

EMR was not accounted for in the main cpuinfoapp check, nor in the check
for SST control support.

Tested: Verified Model and ProtectedIdentificationNumber were populated
under /redf

Add EMR support

EMR was not accounted for in the main cpuinfoapp check, nor in the check
for SST control support.

Tested: Verified Model and ProtectedIdentificationNumber were populated
under /redfish/v1/Systems/system/Processors/cpu0 for an EMR CPU.

Change-Id: I28bccc0f038384fb364245fa62eb4dae466fc795
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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Add missing include for boost::flat_map

A recent update to sdbusplus exposed a missing include. This adds the
include to fix the build.

Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
Chang

Add missing include for boost::flat_map

A recent update to sdbusplus exposed a missing include. This adds the
include to fix the build.

Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
Change-Id: I7db08ff8c85fa2dcf234ff42956b68c6ca6eb0e4

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sdbusplus: use shorter type aliases

The sdbusplus headers provide shortened aliases for many types.
Switch to using them to provide better code clarity and shorter
lines. Possible replacements are

sdbusplus: use shorter type aliases

The sdbusplus headers provide shortened aliases for many types.
Switch to using them to provide better code clarity and shorter
lines. Possible replacements are for:
* bus_t
* exception_t
* manager_t
* match_t
* message_t
* object_t
* slot_t

Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: Ibc88a5de1e7a11d332410985f29698b24aeae983

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sst: Rediscover profiles after host reboot

In some cases, host processor reboot may change the static SST-PP
profile information. This commit adds ability to register callbacks to
run upon hostState

sst: Rediscover profiles after host reboot

In some cases, host processor reboot may change the static SST-PP
profile information. This commit adds ability to register callbacks to
run upon hostState changes, and reruns SST discovery whenever the host
exits the power-off state.

Tested:
- Ran tools/sst-compare-redfish-os.py tool on platform with SPR host
CPU, and observed no mismatches before and after a host reboot.
- Confirmed Redfish OperatingConfig properties still populated when host
is off.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: I9e7b0ebb8c5ec7a8464346f3476490b765579428

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Refactor SST host processor interface

In order to support future host processors that use a different
interface to SST, separate the SST logic into 1) high-level discovery
logic + D-Bus interfaces,

Refactor SST host processor interface

In order to support future host processors that use a different
interface to SST, separate the SST logic into 1) high-level discovery
logic + D-Bus interfaces, and 2) low-level backend processor interface.

This is a pure refactor with no functional change.

Tested:
Ran sst-compare-redfish-os.py tool on platform with SPR host CPU, and
verified no mismatches reported.
Used sst-info.sh to change configs and verify new config was reflected
in Redfish.

Change-Id: I6825eb7541cbe2214844e7b64d462f2688dedcec
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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cpuinfoapp: Add support for ICX-D and SPR

These CPUs definitions were added into libpeci, so now we can support
them in cpuinfoapp.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-I

cpuinfoapp: Add support for ICX-D and SPR

These CPUs definitions were added into libpeci, so now we can support
them in cpuinfoapp.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: Icd719cd106c337572b1cb919957ef5abbdb48be3

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Move PPIN to UniqueIdentifier

The PPIN should be published in Redfish as the
ProtectedIdentificationNumber property rather than SerialNumber. So we
will publish the new UniqueIdentifier D-Bus interf

Move PPIN to UniqueIdentifier

The PPIN should be published in Redfish as the
ProtectedIdentificationNumber property rather than SerialNumber. So we
will publish the new UniqueIdentifier D-Bus interface from cpuinfoapp,
rather than modifying the Asset interface served by smbios-mdrv2.

Tested:
Wait for BIOS to finish and check D-Bus property:
$ busctl get-property xyz.openbmc_project.CPUInfo \
/xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0 \
xyz.openbmc_project.Inventory.Decorator.UniqueIdentifier \
UniqueIdentifier
s "8a8b34a8abcd76a"

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: Ib65f373f3b7a253a458701d9faf10cdb4cddbb07

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Retry PIROM reads to workaround possible failures

PIROM is supposed to be reliable and available in all power states, but
some CPUs have bugs which can cause reads to return invalid data in some
sma

Retry PIROM reads to workaround possible failures

PIROM is supposed to be reliable and available in all power states, but
some CPUs have bugs which can cause reads to return invalid data in some
small time windows. The root causes are complicated, so although the BMC
could technically detect these windows it would take a lot of work.
Instead, this commit just adds logic to read the SSpec from PIROM
multiple times and consider it a success when two reads return the same
data. This relies on the reasonable assumption that the corrupted data
will most likely not look like a valid SSpec, and that it's very
unlikely to hit the invalid window multiple times.

This code still only modifies two D-Bus properties, but now those values
are determined at (potentially) different times, so the property setting
functions are rewritten to work with a global property list. As the
property values are determined, they are added to the list, and are
re-processed as needed (e.g. object/interface gets readded).

Tested: (On 1-CPU platform without working PIROM interface)
- Modified readSSpec to return spoofed value, AC cycled and verified
it was set on target object/interface. Also warm reset host (which
reinitializes D-Bus objects due to SMBIOS tables being resent), and
verified properties are set again.
- Restarted target service (smbios-mdrv2) and verified this service
restarts and re-sets all target properties.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: I963a2c145f1b97b05046da795af97bd7028bc807

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Defer PPIN read until BIOS enables it

On platforms with AST2600 BMC, we now boot fast enough to read the PPIN
over PECI before the BIOS has a chance to enable it (by default it is
not readable). Thi

Defer PPIN read until BIOS enables it

On platforms with AST2600 BMC, we now boot fast enough to read the PPIN
over PECI before the BIOS has a chance to enable it (by default it is
not readable). This commit delays the RdPkgConfig until BIOS is done
with POST.

Without this change, a value of 0 is read (and 0x90 CC - but that's
ignored), which causes us to drop it.

This also removes some unnecessary phosphor namespacing.

Tested:
- Booted from AC cycle, confirmed from journal logs that cpuinfoapp
delays an extra minute before running through getProcessorInfo. PPIN
is now set into SerialNumber D-Bus property and shown on Redfish.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: Ie3e8c668c6b24b42ced22fd9e103d1518702d78a

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Add support for dynamic SST configuration change

- Implement the CurrentOperatingConfig getters to dynamically read
configuration via PECI. The approach is to read the value from
PECI for each D

Add support for dynamic SST configuration change

- Implement the CurrentOperatingConfig getters to dynamically read
configuration via PECI. The approach is to read the value from
PECI for each D-Bus read. When the host is off, return "default"
values, and when the host is on but the read fails, return the last
read (cached) values.
- Implement the CurrentOperatingConfig setters to modify configuration
via PECI.

Tested:
- Change SST-PP profile and SST-BF flag via D-Bus properties, and
confirmed that host-side Linux tool shows changes.
- Change while host off and confirm it's rejected.
- Change while host booting and confirm it's rejected.
- Read configuration while host off and confirm last known values are
returned.
- Read configuration while host booting and confirm actual values are
returned.
- Change on ICX after host booted and confirm it's rejected.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: Ie6eed8ab23bff289e01d6d125402a5509d3a9110

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Get i2c addresses from configuration files.

Different platforms have different bus topology.
Use the peci address and i2c address specified in
json file to read data from cpu.

Tested:
Update basebo

Get i2c addresses from configuration files.

Different platforms have different bus topology.
Use the peci address and i2c address specified in
json file to read data from cpu.

Tested:
Update baseboard json file:
{
"Address": "0x30",
"Bus": 0,
"CpuID": 1,
"Name": "CPU 1",
"PresenceGpio": [
{
"Name": "CPU1_PRESENCE",
"Polarity": "Low"
}
],
"PiromI2cBus": 13,
"PiromI2cAddress": "0x50",
"Type": "XeonCPU"
}
Verified that correct bus addresses are used.

Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
Change-Id: Ib133958af8349b43c2f8f73c32d1aaa0d5bf52eb

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cpuinfoapp: Add SST discovery feature

Retrieve Intel Speed Select Technology (SST) configuration values for
all CPUs via PECI (OS-PCode mailbox). Each CPU may have up to three
Performance Profiles (

cpuinfoapp: Add SST discovery feature

Retrieve Intel Speed Select Technology (SST) configuration values for
all CPUs via PECI (OS-PCode mailbox). Each CPU may have up to three
Performance Profiles (PP), each with accompanying Base Frequency (BF)
information.

Discovery is started immediately, but if no CPUs are found or any
unexpected PECI error is encountered, discovery is aborted and scheduled
for periodic retries until complete.

The profile data is published on D-Bus using two predefined interfaces:
- xyz.openbmc_project.Control.Processor.CurrentOperationConfig, which
is implemented on each "cpu" object in the inventory, and contains
mutable properties for OOB configuration (modifiying properties not
supported yet).
- xyz.openbmc_project.Inventory.Item.Cpu.OperationConfig, which is
implemented on separate "config" objects and contains the readonly
properties for each performance profile.

Tested:
- Profiled performance of PECI operations via code instrumentation
(takes ~2 min per CPU on ast2500 during BMC boot, ~2 sec during BMC idle).
- Validated Redfish output against Linux driver using included python
tool.
- Injected PECI failures in code to test error handling, and tested
with Linux OS idling on host to make sure WOP is working.

Change-Id: I0d8ae79655dfd2880cf3bae6abe600597740df7c
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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cpuinfoapp: Fix SdBusError exception in match rule

In the match rule looking for new interfaces on cpu objects, the first
thing pulled out of the message is an object_path, not a string. Trying
to r

cpuinfoapp: Fix SdBusError exception in match rule

In the match rule looking for new interfaces on cpu objects, the first
thing pulled out of the message is an object_path, not a string. Trying
to read a string first throws an exception caused by
"sd_bus_message_read_basic string: System.Error.ENXIO"

Tested: Added my own interface to the cpu object from within cpuinfoapp
and confirmed that the exception is no longer thrown.

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: I72c226c10975159c8505f8da0cac9a7774ecb9e4

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