Add asset tag support for processor

Type 4 (processor information), has assetTag field at 21h
address, pick the string from the offset and host the assettag
property.

Tested by:
1. After the smbios

Add asset tag support for processor

Type 4 (processor information), has assetTag field at 21h
address, pick the string from the offset and host the assettag
property.

Tested by:
1. After the smbios table transfer from coreboot/u-root the CPU dbus
objects reflects the assettag information as well successfully.

Change-Id: I2492446f31a6a15fa19672b09c2cb0d5b919ff64
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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Add effectiveFamily, effectiveModel and Step to AMD Zen family

Reference:
https://kib.kiev.ua/x86docs/AMD/AMD-CPUID-Spec/25481-r2.28.pdf

Change-Id: Ic4df2ab047a561e565ea3c72321d3e0dc42067e4
Signed-

Add effectiveFamily, effectiveModel and Step to AMD Zen family

Reference:
https://kib.kiev.ua/x86docs/AMD/AMD-CPUID-Spec/25481-r2.28.pdf

Change-Id: Ic4df2ab047a561e565ea3c72321d3e0dc42067e4
Signed-off-by: Konda Reddy Kachana <kkachana@google.com>

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Add CPU functional property

ProcessorSummary in bmcweb always shows disable. Because bmcweb depends
on `xyz.openbmc_project.State.Decorator.OperationalStatus` interface
and `Functional` property to

Add CPU functional property

ProcessorSummary in bmcweb always shows disable. Because bmcweb depends
on `xyz.openbmc_project.State.Decorator.OperationalStatus` interface
and `Functional` property to return CPU functional state.
In this change, include the interface into smbios-mdr and re-add the
property `Functional` removed by smbios-mdr/+/36177

Tested:
```
GET /redfish/v1/Systems/system/
"ProcessorSummary": {
"CoreCount": 112,
"Count": 2,
"Status": {
"Health": "OK",
"HealthRollup": "OK",
"State": "Enabled"
}

busctl introspect xyz.openbmc_project.Smbios.MDR_V2 /xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0
xyz.openbmc_project.State.Decorator.OperationalStatus interface - - -
.Functional property b true emits-change writable
```

Change-Id: I1b4d239ce02d2634a54afb98e4b5e72923fda4fb
Signed-off-by: David Wang <davidwang@quantatw.com>

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Fix compilation warnings

Various small issues:
* Member initialization order
* Comparison of different signedness
* Unused parameters
* Unused variable

Change-Id: Ie59db239b4216ad089f7cf0f289e6ed3d

Fix compilation warnings

Various small issues:
* Member initialization order
* Comparison of different signedness
* Unused parameters
* Unused variable

Change-Id: Ie59db239b4216ad089f7cf0f289e6ed3d6ac8e18
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>

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mdrv2: Attempt to update D-Bus objects in place

When systemInfoUpdate() is called multiple times, there's a potential
race condition of a user polling for the objects while the array of
D-Bus object

mdrv2: Attempt to update D-Bus objects in place

When systemInfoUpdate() is called multiple times, there's a potential
race condition of a user polling for the objects while the array of
D-Bus objects are erased and being repopulated. This results in
incomplete set of memory or CPU counts, which can lead to unforseen
consequences.

Tested: Verified that a corner case that was hitting this case
consistently (when SMBIOS was transferred using ipmi-blob repeatedly)
goes away with this implementation.

Signed-off-by: Brandon Kim <brandonkim@google.com>
Change-Id: I312aa91cd11b1dd06502d04272889922108d39a2

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clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest

clang-format: copy latest and re-format

clang-format-16 has some backwards incompatible changes that require
additional settings for best compatibility and re-running the formatter.
Copy the latest .clang-format from the docs repository and reformat the
repository.

Change-Id: I172b14c1a881c734851b7dc6e0e90ee2e11cce03
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>

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Add effectiveModel and Step to cpu property

Add effectiveModel and Step to cpu property. And correct the
effectiveFamily of cpu property.

Reference:
https://en.wikipedia.org/wiki/CPUID#EAX=1:_Proce

Add effectiveModel and Step to cpu property

Add effectiveModel and Step to cpu property. And correct the
effectiveFamily of cpu property.

Reference:
https://en.wikipedia.org/wiki/CPUID#EAX=1:_Processor_Info_and_Feature_Bits

Change-Id: I4d0ced7081003f41c7e7df13c29089b2f89a7721
Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com>

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cpu: Set DBus EffectiveFamily property

According to the phosphor-dbus-interfaces yaml file, EffectiveFamily is
the raw value of the Processor Family in SMBIOS Processor Information
structure defined

cpu: Set DBus EffectiveFamily property

According to the phosphor-dbus-interfaces yaml file, EffectiveFamily is
the raw value of the Processor Family in SMBIOS Processor Information
structure defined in DSP0134 section 7.5.2. This patch sets that value
on DBus.

Tested:
Verified the value of EffectiveFamily matches the value in SMBIOS table

Change-Id: I9b2274e9fc263d6550fd48e33c7ad233c910b1c1
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@intel.com>

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cpu: Add support for ARM family

In order to detect the ARM family, the Processor Family (Offset 06h)
must contain the value of 0xFE. Then the family is located in
Processor Family 2 (Offset 28h) acc

cpu: Add support for ARM family

In order to detect the ARM family, the Processor Family (Offset 06h)
must contain the value of 0xFE. Then the family is located in
Processor Family 2 (Offset 28h) according to SMBIOS Spec. 3.0.0
and later.

The following ARM families have been added to the family list to
follow SMBIOS Spec. 3.1.1 and later.
- ARMv7
- ARMv8
- ARM
- StrongARM

Tested:
- With ARM CPUs, both dbus and Redfish presented the processor's
family from SMBIOS.

Signed-off-by: Charles Boyer <Charles.Boyer@fii-usa.com>
Change-Id: I21b80f34bfe76a2a2b6d78ee7aace54ded6abec4

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smbios-mdr: Associate with the motherboard

The change associates the objects such as processor, memory and PCIe
slots published by smbios-mdr with the motherboard inventory object.
Presently objects

smbios-mdr: Associate with the motherboard

The change associates the objects such as processor, memory and PCIe
slots published by smbios-mdr with the motherboard inventory object.
Presently objects paths created by smbios-mdr have the motherboard path
as the prefix -- "/xyz/openbmc_project/inventory/chassis/motherboard".
For machine with entity-manager dynamic stack, that hardcoded
motherboard path would probably not be the object path of the
motherboard.

We have implemented a DBus method in EM that can return the inventory
object path of the root board in the system. Such associations can be
assembled in Redfish resources can indicate the machine topology.

Tested:
DBus call on the Association interface of a CPU object.

busctl get-property xyz.openbmc_project.Smbios.MDR_V2 \
/xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0 \
xyz.openbmc_project.Association.Definitions Associations
a(sss) 1 "chassis" "processors" \
"/xyz/openbmc_project/inventory/system/board/GSZ"

Signed-off-by: Jie Yang <jjy@google.com>
Change-Id: Ia95159a87c2ce5e69e90e622cf341a68e7db13d4

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Add CPU and memory LocationCode DBus interface

LocationCode DBus interface can describe the sockets with physical
labels printed on the board. Bmcweb looks up the LocationCode for CPU
and DIMM resou

Add CPU and memory LocationCode DBus interface

LocationCode DBus interface can describe the sockets with physical
labels printed on the board. Bmcweb looks up the LocationCode for CPU
and DIMM resources and then identify the resource location. Those
physical CPU and DIMM socket labels are hardcoded in SMBIOS table as
socket designation.

Tested:
CPU and memory DBus objects show the
xyz.openbmc_project.Inventory.Decorator.LocationCode interface and the
LocationCode property is the socket label.

Signed-off-by: Jie Yang <jjy@google.com>
Change-Id: I6131567aca1958505989773fc800a4c2d1dd7e1f

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cpu: Add support for part and serial numbers

This will obtain the part and serial numbers from SMBIOS, and store
them in the cpu dbus interface. The serial number is obtained from
the Serial Number

cpu: Add support for part and serial numbers

This will obtain the part and serial numbers from SMBIOS, and store
them in the cpu dbus interface. The serial number is obtained from
the Serial Number Offset of 20h, and the part number is obtained
from the Part Number Offset of 22h.

Tested:
- Both dbus and Redfish present the part and serial numbers
obtained from SMBIOS.

Signed-off-by: Charles Boyer <Charles.Boyer@fii-usa.com>
Change-Id: I5b26ed5c0ce1135aa7aba3e335ec7da1588d11b1

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Implement Inventory.Item for CPU presence

Bmcweb Redfish code now relies on the xyz.openbmc_project.Inventory.Item
interface to determine Processor presence status. And if this interface
does not ex

Implement Inventory.Item for CPU presence

Bmcweb Redfish code now relies on the xyz.openbmc_project.Inventory.Item
interface to determine Processor presence status. And if this interface
does not exist, CPUs are shown as Present by default. Therefore, to
avoid false positive presence, this commit fills out the interface based
on Status field of the Type 4 table.

Tested:
GET /redfish/v1/Systems/system/Processor/cpu1 (unpopulated socket)
-> Before change:
{
...
"Manufacturer": "CPU1",
"MaxSpeedMHz": 4000,
"ProcessorId": {
"EffectiveFamily": "Unknown Processor Family"
},
"Socket": "CPU1",
"Status": {
"Health": "OK",
"State": "Enabled"
},
"Version": "CPU1"
...
}
-> After change:
{
...
"Manufacturer": "",
"MaxSpeedMHz": 0,
"ProcessorId": {
"EffectiveFamily": ""
},
"Socket": "CPU1",
"Status": {
"Health": "OK",
"State": "Absent"
},
"Version": ""
...
}

GET /redfish/v1/Systems/system/Processor/cpu0 (populated socket)
-> Before/after change:
{
...
"Status": {
"Health": "OK",
"State": "Enabled"
},
...
}

Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
Change-Id: I8868919e3f919d774b8bedb6c48cc6e4bc764c26

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Move downstream package to upstream

Use upstream cpu interface

Signed-off-by: Zhikui Ren <zhikui.ren@intel.com>
Change-Id: I490482b212df4b73cbdedaba0bc5fefa229a5489

Fix some build failure issue

Fix some issues which will make build failure.
Also format the code with latest clang-format.

Tested:
Power cycle the system and after BIOS finish post, correct DIMM an

Fix some build failure issue

Fix some issues which will make build failure.
Also format the code with latest clang-format.

Tested:
Power cycle the system and after BIOS finish post, correct DIMM and CPU
information and UUID can show in Redfish.

Signed-off-by: Cheng C Yang <cheng.c.yang@linux.intel.com>
Change-Id: I5833a89842bc0969829d10fed262cf43d31d8c3f

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Add CPU dbus service for MDR V2

Add all CPU information in smbios table and provide dbus
interface for redfish to get CPU information.

Tested:
DC cycle system and waiting for BIOS entering setup pa

Add CPU dbus service for MDR V2

Add all CPU information in smbios table and provide dbus
interface for redfish to get CPU information.

Tested:
DC cycle system and waiting for BIOS entering setup page.
Check CPU information in Redfish, Redfish should show correct CPU
information.

Signed-off-by: Cheng C Yang <cheng.c.yang@linux.intel.com>
Change-Id: I8e6f803c516267de094a01fb1b1fa7d2420d2474

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