History log of /openbmc/qemu/tests/tcg/i386/Makefile.target (Results 1 – 25 of 62)
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Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0
# 4eac9dfb 05-Mar-2024 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu into staging

linux-user: Rewrite elf coredump
tcg/aarch64: Apple does not align __int128_t in even registers
accel/tcg: Fixes for pag

Merge tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu into staging

linux-user: Rewrite elf coredump
tcg/aarch64: Apple does not align __int128_t in even registers
accel/tcg: Fixes for page tables in mmio memory
linux-user: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN
migration: Remove qemu_host_page_size
hw/tpm: Remove qemu_host_page_size
softmmu: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN
linux-user: Split and reorganize target_mmap.
*-user: Deprecate and disable -p pagesize
linux-user: Allow TARGET_PAGE_BITS_VARY
target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only
target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only
target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only
linux-user: Remove pgb_dynamic alignment assertion
tcg/optimize: fix uninitialized variable
linux-user: Rewrite shmat

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# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu: (60 commits)
tests/tcg: Check that shmat() does not break /proc/self/maps
linux-user: Rewrite target_shmat
linux-user: Add strace for shmat
linux-user/loongarch64: Remove TARGET_FORCE_SHMLBA
linux-user/x86_64: Handle the vsyscall page in open_self_maps_{2,4}
tcg/optimize: fix uninitialized variable
linux-user: Remove pgb_dynamic alignment assertion
target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only
target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only
linux-user: Bound mmap_min_addr by host page size
target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only
linux-user: Allow TARGET_PAGE_BITS_VARY
accel/tcg: Disconnect TargetPageDataNode from page size
cpu: Remove page_size_init
*-user: Deprecate and disable -p pagesize
tests/tcg: Extend file in linux-madvise.c
tests/tcg: Remove run-test-mmap-*
linux-user: Split out mmap_h_gt_g
linux-user: Split out mmap_h_lt_g
linux-user: Split out mmap_h_eq_g
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# e9206163 01-Jan-2024 Richard Henderson <richard.henderson@linaro.org>

tests/tcg: Remove run-test-mmap-*

These tests are confused, because -p does not change
the guest page size, but the host page size.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
R

tests/tcg: Remove run-test-mmap-*

These tests are confused, because -p does not change
the guest page size, but the host page size.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20240102015808.132373-25-richard.henderson@linaro.org>

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# 05470c39 04-Jan-2024 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optim

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optimizations
* target/i386: implement CMPccXADD
* target/i386: the sgx_epc_get_section stub is reachable
* esp: check for NULL result from scsi_device_find()

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# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits)
meson.build: report graphics backends separately
configure, meson: rename targetos to host_os
meson: rename config_all
meson: remove CONFIG_ALL
meson: remove config_targetos
meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos
meson: remove OS definitions from config_targetos
meson: always probe u2f and canokey if the option is enabled
meson: move subdirs to "Collect sources" section
meson: move config-host.h definitions together
meson: move CFI detection code with other compiler flags
meson: keep subprojects together
meson: move accelerator dependency checks together
meson: move option validation together
meson: move program checks together
meson: add more sections to main meson.build
configure: unify again the case arms in probe_target_compiler
configure: remove unnecessary subshell
Makefile: clean qemu-iotests output
meson: use version_compare() to compare version
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# e7bbb7cb 11-Oct-2023 Paolo Bonzini <pbonzini@redhat.com>

target/i386: introduce flags writeback mechanism

ALU instructions can write to both memory and flags. If the CC_SRC*
and CC_DST locations have been written already when a memory access
causes a fau

target/i386: introduce flags writeback mechanism

ALU instructions can write to both memory and flags. If the CC_SRC*
and CC_DST locations have been written already when a memory access
causes a fault, the value in CC_SRC* and CC_DST might be interpreted
with the wrong CC_OP (the one that is in effect before the instruction.

Besides just using the wrong result for the flags, something like
subtracting -1 can have disastrous effects if the current CC_OP is
CC_OP_EFLAGS: this is because QEMU does not expect bits outside the ALU
flags to be set in CC_SRC, and env->eflags can end up set to all-ones.
In the case of the attached testcase, this sets IOPL to 3 and would
cause an assertion failure if SUB is moved to the new decoder.

This mechanism is not really needed for BMI instructions, which can
only write to a register, but put it to use anyway for cleanliness.
In the case of BZHI, the code has to be modified slightly to ensure
that decode->cc_src is written, otherwise the new assertions trigger.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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# 997ef293 31-Oct-2023 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'pull-halloween-omnibus-311023-2' of https://gitlab.com/stsquad/qemu into staging

Maintainer updates for testing, gitlab, gdbstub and plugins:

- add dtc package to openbsd VMs
- use -

Merge tag 'pull-halloween-omnibus-311023-2' of https://gitlab.com/stsquad/qemu into staging

Maintainer updates for testing, gitlab, gdbstub and plugins:

- add dtc package to openbsd VMs
- use -fno-stack-protector for non-stdlib tests
- split alpha and sh4 compilers into legacy image
- harmonise other compilers into debian-all-test-cross
- fix NULL check in gdb_regs
- fix memleak in semihosting
- remove unused parameter in plugin code
- fix fd leak in lockstep plugin

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* tag 'pull-halloween-omnibus-311023-2' of https://gitlab.com/stsquad/qemu:
contrib/plugins: Close file descriptor on error return
plugins: Remove an extra parameter
semihosting: fix memleak at semihosting_arg_fallback
gdbstub: Check if gdb_regs is NULL
tests/docker: upgrade debian-all-test-cross to bookworm
tests/docker: use debian-all-test-cross for sparc64
tests/docker: use debian-all-test-cross for riscv64
tests/docker: use debian-all-test-cross for mips
tests/docker: use debian-all-test-cross for mips64
tests/docker: use debian-all-test-cross for m68k
tests/docker: use debian-all-test-cross for hppa
tests/docker: use debian-all-test-cross for power
tests/docker: move sh4 to use debian-legacy-test-cross
tests/docker: use debian-legacy-test-cross for alpha
gitlab: add build-loongarch to matrix
gitlab: clean-up build-soft-softmmu job
gitlab: split alpha testing into a legacy container
tests/tcg: Add -fno-stack-protector
tests/vm/openbsd: Use the system dtc package

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

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# 580731dc 29-Oct-2023 Akihiko Odaki <akihiko.odaki@daynix.com>

tests/tcg: Add -fno-stack-protector

A build of GCC 13.2 will have stack protector enabled by default if it
was configured with --enable-default-ssp option. For such a compiler,
it is necessary to ex

tests/tcg: Add -fno-stack-protector

A build of GCC 13.2 will have stack protector enabled by default if it
was configured with --enable-default-ssp option. For such a compiler,
it is necessary to explicitly disable stack protector when linking
without standard libraries.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20230731091042.139159-3-akihiko.odaki@daynix.com>
[AJB: fix comment string typo]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20231029145033.592566-3-alex.bennee@linaro.org>

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# 2ff49e96 09-Jul-2023 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-tcg-20230709' of https://gitlab.com/rth7680/qemu into staging

crypto: Provide aes-round.h and host accel

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Merge tag 'pull-tcg-20230709' of https://gitlab.com/rth7680/qemu into staging

crypto: Provide aes-round.h and host accel

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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230709' of https://gitlab.com/rth7680/qemu: (37 commits)
crypto: Unexport AES_*_rot, AES_TeN, AES_TdN
crypto: Remove AES_imc
crypto: Implement aesdec_IMC with AES_imc_rot
crypto: Remove AES_shifts, AES_ishifts
target/riscv: Use aesdec_ISB_ISR_IMC_AK
target/riscv: Use aesenc_SB_SR_MC_AK
target/riscv: Use aesdec_IMC
target/riscv: Use aesdec_ISB_ISR_AK
target/riscv: Use aesenc_SB_SR_AK
target/arm: Use aesdec_IMC
target/arm: Use aesenc_MC
target/arm: Use aesdec_ISB_ISR_AK
target/arm: Use aesenc_SB_SR_AK
target/arm: Demultiplex AESE and AESMC
target/i386: Use aesdec_ISB_ISR_IMC_AK
target/i386: Use aesenc_SB_SR_MC_AK
target/i386: Use aesdec_IMC
target/i386: Use aesdec_ISB_ISR_AK
target/i386: Use aesenc_SB_SR_AK
target/ppc: Use aesdec_ISB_ISR_AK_IMC
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# ca1e9c3b 01-Jun-2023 Richard Henderson <richard.henderson@linaro.org>

tests/multiarch: Add test-aes

Use a shared driver and backends for i386, aarch64, ppc64, riscv64.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@

tests/multiarch: Add test-aes

Use a shared driver and backends for i386, aarch64, ppc64, riscv64.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# 4329d049 26-Jun-2023 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging

accel/tcg: Replace target_ulong in some APIs
accel/tcg: Remove CONFIG_PROFILER
accel/tcg: Store some tlb flags in CPUTLB

Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging

accel/tcg: Replace target_ulong in some APIs
accel/tcg: Remove CONFIG_PROFILER
accel/tcg: Store some tlb flags in CPUTLBEntryFull
tcg: Issue memory barriers as required for the guest memory model
tcg: Fix temporary variable in tcg_gen_gvec_andcs

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# gpg: Signature made Mon 26 Jun 2023 05:38:32 PM CEST
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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu: (22 commits)
accel/tcg: Renumber TLB_DISCARD_WRITE
accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASK
accel/tcg: Store some tlb flags in CPUTLBEntryFull
accel/tcg: Remove check_tcg_memory_orders_compatible
tcg: Add host memory barriers to cpu_ldst.h interfaces
tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
target/microblaze: Define TCG_GUEST_DEFAULT_MO
tcg: Fix temporary variable in tcg_gen_gvec_andcs
accel/tcg: remove CONFIG_PROFILER
tests/plugin: Remove duplicate insn log from libinsn.so
softfloat: use QEMU_FLATTEN to avoid mistaken isra inlining
cpu: Replace target_ulong with hwaddr in tb_invalidate_phys_addr()
accel/tcg: Replace target_ulong with vaddr in translator_*()
accel/tcg: Replace target_ulong with vaddr in *_mmu_lookup()
accel: Replace target_ulong with vaddr in probe_*()
accel/tcg: Widen pc to vaddr in CPUJumpCache
accel/tcg/cpu-exec.c: Widen pc to vaddr
accel/tcg/cputlb.c: Widen addr in MMULookupPageData
accel/tcg/cputlb.c: Widen CPUTLBEntry access functions
target: Widen pc/cs_base in cpu_get_tb_cpu_state
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# ea185a55 10-Jun-2023 Richard Henderson <richard.henderson@linaro.org>

tests/plugin: Remove duplicate insn log from libinsn.so

This is a perfectly natural occurrence for x86 "rep movb",
where the "rep" prefix forms a counted loop of the one insn.

During the tests/tcg/

tests/plugin: Remove duplicate insn log from libinsn.so

This is a perfectly natural occurrence for x86 "rep movb",
where the "rep" prefix forms a counted loop of the one insn.

During the tests/tcg/multiarch/memory test, this logging is
triggered over 350000 times. Within the context of cross-i386-tci
build, which is already slow by nature, the logging is sufficient
to push the test into timeout.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# cc5ee50f 27-Apr-2023 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-testing-docs-270423-1' of https://gitlab.com/stsquad/qemu into staging

Testing and documentation updates:

- bump avocado to 101.0
- use snapshots for tuxrun baseline tests
- a

Merge tag 'pull-testing-docs-270423-1' of https://gitlab.com/stsquad/qemu into staging

Testing and documentation updates:

- bump avocado to 101.0
- use snapshots for tuxrun baseline tests
- add sbda-ref test to avocado
- avoid spurious re-configure in gitlab
- better description of blockdev options
- drop FreeBSD 12 from Cirrus CI
- fix up the ast2[56]00 tests to be more stable
- improve coverage of ppc64 tests in tuxrun baselines
- limit plugin tests to just the generic multiarch binaries

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# gpg: Signature made Thu 27 Apr 2023 03:02:53 PM BST
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-testing-docs-270423-1' of https://gitlab.com/stsquad/qemu:
docs/style: call out the use of GUARD macros
docs/devel: mention the spacing requirement for QOM
docs/devel: make a statement about includes
docs/system: remove excessive punctuation from guest-loader docs
qemu-options.hx: Update descriptions of memory options for NUMA node
tests/tcg: limit the scope of the plugin tests
tests/avocado/tuxrun_baselines.py: improve code coverage for ppc64
avocado_qemu/__init__.py: factor out the qemu-img finding
MAINTAINERS: Cover tests/avocado/machine_aspeed.py
tests/avocado/machine_aspeed: Fix the broken ast2[56]00_evb_sdk tests
tests/avocado: Make ssh_command_output_contains() globally available
.gitlab-ci.d/cirrus: Drop the CI job for compiling with FreeBSD 12
qemu-options: finesse the recommendations around -blockdev
scripts/device-crash-test: Add a parameter to run with TCG only
gitlab-ci: Avoid to re-run "configure" in the device-crash-test jobs
tests/avocado: Add set of boot tests on SBSA-ref
tests/avocado: use the new snapshots for testing
tests/requirements.txt: bump up avocado-framework version to 101.0

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


# d044b7c3 24-Apr-2023 Alex Bennée <alex.bennee@linaro.org>

tests/tcg: limit the scope of the plugin tests

Running every plugin with every test is getting excessive as well as
not really improving coverage that much. Restrict the plugin tests to
just the MUL

tests/tcg: limit the scope of the plugin tests

Running every plugin with every test is getting excessive as well as
not really improving coverage that much. Restrict the plugin tests to
just the MULTIARCH_TESTS which are shared between most architecture
for both system and user-mode. For those that aren't we need to squash
MULTIARCH_TESTS so we don't add them when they are not part of the
TESTS global.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230424092249.58552-14-alex.bennee@linaro.org>

show more ...


Revision tags: v8.0.0
# 003ba52a 16-Feb-2023 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* block/iscsi: fix double-free on BUSY or similar statuses
* catch [accel] entry without accelerator
* target/i386: various f

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* block/iscsi: fix double-free on BUSY or similar statuses
* catch [accel] entry without accelerator
* target/i386: various fixes for BMI and ADX instructions
* make the contents of meson-buildoptions.sh stable

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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
libqtest: ensure waitpid() is only called once
libqtest: split qtest_spawn_qemu function
target/i386: fix ADOX followed by ADCX
target/i386: Fix C flag for BLSI, BLSMSK, BLSR
target/i386: Fix BEXTR instruction
tests/tcg/i386: Introduce and use reg_t consistently
vl: catch [accel] entry without accelerator
block/iscsi: fix double-free on BUSY or similar statuses
remove unnecessary extern "C" blocks
build: make meson-buildoptions.sh stable

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 60c7dd22 31-Jan-2023 Paolo Bonzini <pbonzini@redhat.com>

target/i386: fix ADOX followed by ADCX

When ADCX is followed by ADOX or vice versa, the second instruction's
carry comes from EFLAGS and the condition codes use the CC_OP_ADCOX
operation. Retrievin

target/i386: fix ADOX followed by ADCX

When ADCX is followed by ADOX or vice versa, the second instruction's
carry comes from EFLAGS and the condition codes use the CC_OP_ADCOX
operation. Retrieving the carry from EFLAGS is handled by this bit
of gen_ADCOX:

tcg_gen_extract_tl(carry_in, cpu_cc_src,
ctz32(cc_op == CC_OP_ADCX ? CC_C : CC_O), 1);

Unfortunately, in this case cc_op has been overwritten by the previous
"if" statement to CC_OP_ADCOX. This works by chance when the first
instruction is ADCX; however, if the first instruction is ADOX,
ADCX will incorrectly take its carry from OF instead of CF.

Fix by moving the computation of the new cc_op at the end of the function.
The included exhaustive test case fails without this patch and passes
afterwards.

Because ADCX/ADOX need not be invoked through the VEX prefix, this
regression bisects to commit 16fc5726a6e2 ("target/i386: reimplement
0x0f 0x38, add AVX", 2022-10-18). However, the mistake happened a
little earlier, when BMI instructions were rewritten using the new
decoder framework.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1471
Reported-by: Paul Jolly <https://gitlab.com/myitcv>
Fixes: 1d0b926150e5 ("target/i386: move scalar 0F 38 and 0F 3A instruction to new decoder", 2022-10-18)
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


Revision tags: v7.2.0
# 214a8da2 18-Oct-2022 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: don't enable firmware for targets that are not built
* configure: don't use strings(1)
* scsi, target/i386: swit

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: don't enable firmware for targets that are not built
* configure: don't use strings(1)
* scsi, target/i386: switch from device_legacy_reset() to device_cold_reset()
* target/i386: AVX support for TCG
* target/i386: fix SynIC SINT assertion failure on guest reset
* target/i386: Use atomic operations for pte updates and other cleanups
* tests/tcg: extend SSE tests to AVX
* virtio-scsi: send "REPORTED LUNS CHANGED" sense data upon disk hotplug events

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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (53 commits)
target/i386: remove old SSE decoder
target/i386: move 3DNow to the new decoder
tests/tcg: extend SSE tests to AVX
target/i386: Enable AVX cpuid bits when using TCG
target/i386: implement VLDMXCSR/VSTMXCSR
target/i386: implement XSAVE and XRSTOR of AVX registers
target/i386: reimplement 0x0f 0x28-0x2f, add AVX
target/i386: reimplement 0x0f 0x10-0x17, add AVX
target/i386: reimplement 0x0f 0xc2, 0xc4-0xc6, add AVX
target/i386: reimplement 0x0f 0x38, add AVX
target/i386: Use tcg gvec ops for pmovmskb
target/i386: reimplement 0x0f 0x3a, add AVX
target/i386: clarify (un)signedness of immediates from 0F3Ah opcodes
target/i386: reimplement 0x0f 0xd0-0xd7, 0xe0-0xe7, 0xf0-0xf7, add AVX
target/i386: reimplement 0x0f 0x70-0x77, add AVX
target/i386: reimplement 0x0f 0x78-0x7f, add AVX
target/i386: reimplement 0x0f 0x50-0x5f, add AVX
target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX
target/i386: reimplement 0x0f 0x60-0x6f, add AVX
target/i386: Introduce 256-bit vector helpers
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


# 0339ddfa 20-Sep-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: extend SSE tests to AVX

Extracted from a patch by Paul Brook <paul@nowt.org>.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.

tests/tcg: extend SSE tests to AVX

Extracted from a patch by Paul Brook <paul@nowt.org>.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


# f1d33f55 06-Oct-2022 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu into staging

testing, gdbstub, plugin and gitdm updates

- cleanup scripts/ci/setup in advance of ppc64 r

Merge tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu into staging

testing, gdbstub, plugin and gitdm updates

- cleanup scripts/ci/setup in advance of ppc64 runner
- ensure detected gdb reported to TCG tests
- update hexagon container with build deps
- move alpine container to tagged release
- fix overflow during qos-test test tree iteration
- allow bios blobs to be built with test cross compilers
- introduce monitor_puts for plain strings
- share disas code between monitor and plugins
- fix bug in execlog plugin
- add more tcg plugin documentation, reorg
- fix link to semihosting spec
- re-factor gdbstub to use AccelClass/Ops
- many gitdm updates
- fix race with plugin mutex lock and linux-user fork()

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# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu: (52 commits)
plugins: add [pre|post]fork helpers to linux-user
contrib/gitdm: add Université Grenoble Alpes
contrib/gitdm: add Simon to individual contributors
contrib/gitdm: add China Telecom to the domain map
contrib/gitdm: add ISCAS to the academics group
contrib/gitdm: add WANG Xuerui to individual contributers
contrib/gitdm: add Paul to individual contributors
contrib/gitdm: add mapping for Loongson Technology
accel/kvm: move kvm_update_guest_debug to inline stub
gdbstub: move guest debug support check to ops
gdbstub: move breakpoint logic to accel ops
gdbstub: move sstep flags probing into AccelClass
gdbstub: move into its own sub directory
semihosting: update link to spec
docs/devel: document the test plugins
contrib/plugins: reset skip when matching in execlog
docs/devel: move API to end of tcg-plugins.rst
docs/devel: clean-up qemu invocations in tcg-plugins
plugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr
plugins: extend execlog to filter matches
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


# 15b273f8 29-Sep-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: move compiler tests to Makefiles

Further decoupling of tests/tcg from the main QEMU Makefile, and making
the build more similar between the cross compiler case and the vetted
container im

tests/tcg: move compiler tests to Makefiles

Further decoupling of tests/tcg from the main QEMU Makefile, and making
the build more similar between the cross compiler case and the vetted
container images.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-25-alex.bennee@linaro.org>

show more ...


# c6cf8a20 29-Sep-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: clean up calls to run-test

Almost all invocations of run-test have either "$* on $(TARGET_NAME)"
or "$< on $(TARGET_NAME)" as the last argument. So provide a default
test name, while all

tests/tcg: clean up calls to run-test

Almost all invocations of run-test have either "$* on $(TARGET_NAME)"
or "$< on $(TARGET_NAME)" as the last argument. So provide a default
test name, while allowing an escape hatch for custom names.

As an additional simplification, remove the need to do shell quoting.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220929114231.583801-24-alex.bennee@linaro.org>

show more ...


# 1b3a3383 20-Sep-2022 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* add help option for -audio and -audiodev
* another missing memory barrier for dirty pages
* target/i386: Raise #GP on unali

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* add help option for -audio and -audiodev
* another missing memory barrier for dirty pages
* target/i386: Raise #GP on unaligned m128 accesses
* coverity fixes + improvements to components
* add MMX and 3DNow! tests
* SSE4a fixes
* target/i386: TCG translation cleanups
* update qboot submodule

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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (21 commits)
qboot: update to latest submodule
build: remove extra parentheses causing missing rebuilds
target/i386: introduce insn_get_addr
target/i386: REPZ and REPNZ are mutually exclusive
target/i386: fix INSERTQ implementation
target/i386: correctly mask SSE4a bit indices in register operands
audio: add help option for -audio and -audiodev
tests/tcg: remove old SSE tests
tests/tcg: refine MMX support in SSE tests
tests/tcg: i386: add MMX and 3DNow! tests
tests/tcg: i386: fix typos in 3DNow! instructions
tests: unit: add NULL-pointer check
tests: test-qga: close socket on failure to connect
tests: unit: simplify test-visitor-serialization list tests
smbios: sanitize type from external type before checking have_fields_bitmap
coverity: put NUBus under m68k component
coverity: add new RISC-V component
spapr_pci: fix leak in spapr_phb_vfio_get_loc_code
kvm: fix memory leak on failure to read stats descriptors
target/i386: Raise #GP on unaligned m128 accesses when required.
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


# fa7ce0b0 01-Sep-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: i386: add MMX and 3DNow! tests

Adjust the test-avx.py generator to produce tests specifically for
MMX and 3DNow. Using a separate generator introduces some code
duplication, but is a sim

tests/tcg: i386: add MMX and 3DNow! tests

Adjust the test-avx.py generator to produce tests specifically for
MMX and 3DNow. Using a separate generator introduces some code
duplication, but is a simpler approach because of test-avx's extra
complexity to support 3- and 4-operand AVX instructions.

If needed, a common library can be introduced later.

While at it, for consistency move all the -cpu max rules to the
same place.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


# 61fd710b 02-Sep-2022 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* SCSI fixes for Mac OS 9
* Fix CPU reset for x86/KVM nested virtualization state
* remove feature_not_found() from the confi

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* SCSI fixes for Mac OS 9
* Fix CPU reset for x86/KVM nested virtualization state
* remove feature_not_found() from the configure script
* Meson cleanups from muon
* improved i386 TCG tests for BMI and SSE
* SSE bugfixes

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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (39 commits)
target/i386: AVX+AES helpers prep
target/i386: AVX pclmulqdq prep
target/i386: Rewrite blendv helpers
target/i386: Misc AVX helper prep
target/i386: Destructive FP helpers for AVX
target/i386: Dot product AVX helper prep
target/i386: reimplement AVX comparison helpers
target/i386: Floating point arithmetic helper AVX prep
target/i386: Destructive vector helpers for AVX
target/i386: Misc integer AVX helper prep
target/i386: Rewrite simple integer vector helpers
target/i386: Rewrite vector shift helper
target/i386: rewrite destructive 3DNow operations
target/i386: Add CHECK_NO_VEX
target/i386: do not cast gen_helper_* function pointers
target/i386: Add size suffix to vector FP helpers
target/i386: isolate MMX code more
target/i386: check SSE table flags instead of hardcoding opcodes
target/i386: Move 3DNOW decoder
target/i386: Rework sse_op_table6/7
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


# 91117bc5 24-Apr-2022 Paul Brook <paul@nowt.org>

tests/tcg: i386: add SSE tests

Tests for correct operation of most x86-64 SSE instructions.
It should cover all combinations of overlapping register and memory
operands on a set of random-ish data.

tests/tcg: i386: add SSE tests

Tests for correct operation of most x86-64 SSE instructions.
It should cover all combinations of overlapping register and memory
operands on a set of random-ish data.

Results are bit-identical to an Intel i5-8500, with the exception of
the RCPSS and RSQRT approximations where the real CPU gives less accurate
results (the Intel spec allows relative errors up to 1.5 * 2^-12)

Signed-off-by: Paul Brook <paul@nowt.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220424220204.2493824-42-paul@nowt.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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# 7b764d41 25-Aug-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: i386: extend BMI test

Cover all BMI1 and BMI2 instructions, both 32- and 64-bit.

Due to the use of inlines, the test now has to be compiled with -O2.

Reviewed-by: Richard Henderson <ric

tests/tcg: i386: extend BMI test

Cover all BMI1 and BMI2 instructions, both 32- and 64-bit.

Due to the use of inlines, the test now has to be compiled with -O2.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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# 9e8504c0 25-Aug-2022 Paolo Bonzini <pbonzini@redhat.com>

tests/tcg: x86_64: improve consistency with i386

Include test-i386-bmi2, and specify manually the tests (only one for now)
that need -cpu max.

Reviewed-by: Richard Henderson <richard.henderson@lina

tests/tcg: x86_64: improve consistency with i386

Include test-i386-bmi2, and specify manually the tests (only one for now)
that need -cpu max.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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