Merge tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu into staging

Updates for testing, plugins, gdbstub

- restore some 32 bit host builds and testing
- move some physm

Merge tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu into staging

Updates for testing, plugins, gdbstub

- restore some 32 bit host builds and testing
- move some physmem tracepoint definitions
- use --userns keep-id for podman builds
- cleanup check-tcg compiler flag checking for Arm
- fix some casting in fcvt test
- tweak check-tcg inline asm for clang
- suppress some invalid clang warnings
- disable KVM for the TCI builds
- improve the insn tracking plugin
- cleanups to the lockstep plugin
- free plugin data on cpu finalise
- assert cpu->index assigned
- move qemu_plugin_vcpu_init__async into plugin code
- add support for dynamic gdb command tables
- allow targets to extend gdb capabilities
- enable user-mode MTE support

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmaH3bEACgkQ+9DbCVqe
# KkTnvwf9HS68sTICEJqBfY663hjcfdFGsSV/h3q7SN3fhKm/3JHGNK+kumgqdnaC
# ykd7tx0AtBGgKm83B7G6MPywsVMIosMeV3mFeJTVHhKsFwGNjSiGkr3j4R2qxjFt
# nYQ977FqBKyhvhSplR2wwhwi+JpuGWFGlnQTvdF2Z7ni4YCDFcbl4eiMyGwsjbWm
# 0VBP+wCSSMIIbS9Qb7DrhZlfu0+wKZK/q0FLzVVofcLSXGou+Mse/qhtG+yAU/FI
# qqqV+7J4PU9E4BqFaklxyRtBrpXNDgpo77pu6ZR7oDXD7HNMuIAuEIlkxMJjarNM
# xN64WOOzw15R2RMVyXdYx6ccxWft2Q==
# =9Gmk
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 Jul 2024 04:49:05 AM PDT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]

* tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu: (40 commits)
tests/tcg/aarch64: Add MTE gdbstub tests
gdbstub: Add support for MTE in user mode
gdbstub: Use true to set cmd_startswith
gdbstub: Pass CPU context to command handler
gdbstub: Make hex conversion function non-internal
target/arm: Factor out code for setting MTE TCF0 field
target/arm: Make some MTE helpers widely available
target/arm: Fix exception case in allocation_tag_mem_probe
gdbstub: Add support for target-specific stubs
gdbstub: Move GdbCmdParseEntry into a new header file
gdbstub: Clean up process_string_cmd
accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/
plugins: Free CPUPluginState before destroying vCPU state
plugins: Ensure vCPU index is assigned in init/exit hooks
plugins/lockstep: clean-up output
plugins/lockstep: mention the one-insn-per-tb option
plugins/lockstep: make mixed-mode safe
plugins/lockstep: preserve sock_path
test/plugins: preserve the instruction record over translations
test/plugin: make insn plugin less noisy by default
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrc

Clang 14 generates

/home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction
asm("mrc p10, 7, r1, cr1, cr0, 0\n\t"

tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrc

Clang 14 generates

/home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction
asm("mrc p10, 7, r1, cr1, cr0, 0\n\t"
^
<inline asm>:1:6: note: instantiated into assembly here
mrc p10, 7, r1, cr1, cr0, 0
^
/home/rth/qemu/src/tests/tcg/arm/fcvt.c:432:32: error: invalid operand for instruction
"orr r1, r1, %[flags]\n\t"
^
<inline asm>:3:6: note: instantiated into assembly here
mcr p10, 7, r1, cr1, cr0, 0
^

This is perhaps a clang bug, but using the neon mnemonic is clearer.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-14-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-19-alex.bennee@linaro.org>

show more ...

tests/tcg/arm: Manually register allocate half-precision numbers

Clang does not allow specifying an integer as the value of a single
precision register. Explicitly move value from a general registe

tests/tcg/arm: Manually register allocate half-precision numbers

Clang does not allow specifying an integer as the value of a single
precision register. Explicitly move value from a general register.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
[rth: Use one single inline asm block.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-12-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-17-alex.bennee@linaro.org>

show more ...

tests/tcg/arm: Fix fcvt result messages

The test cases for "converting double-precision to single-precision"
emits float but the result variable was typed as uint32_t and corrupted
the printed value

tests/tcg/arm: Fix fcvt result messages

The test cases for "converting double-precision to single-precision"
emits float but the result variable was typed as uint32_t and corrupted
the printed values. Propertly type it as float.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases for AArch32/64")
Message-Id: <20240627-tcg-v2-1-1690a813348e@daynix.com>
[rth: Update arm ref file as well]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-9-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-14-alex.bennee@linaro.org>

show more ...

tests/tcg/aarch64: Do not use x constraint

clang version 18.1.6 does not support x constraint for AArch64.
Use w instead.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <202406

tests/tcg/aarch64: Do not use x constraint

clang version 18.1.6 does not support x constraint for AArch64.
Use w instead.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240627-tcg-v2-5-1690a813348e@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-7-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-12-alex.bennee@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* New -action option and set-action QMP command (Alejandro)
* More vl.c cleanup (myself with help from Daniel and

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* New -action option and set-action QMP command (Alejandro)
* More vl.c cleanup (myself with help from Daniel and Igor)
* Remove deprecated options (Philippe, Thomas)
* Dirty bitmap fix (Zenghui)
* icount caching speedup (Pavel)
* SCSI race fix (Maxim)
* Remove pre-GCC 4.8 code (Marc-André)

# gpg: Signature made Tue 15 Dec 2020 17:53:24 GMT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (45 commits)
build: -no-pie is no functional linker flag
scripts/git.orderfile: Keep files with .inc extension sorted
compiler.h: remove QEMU_GNUC_PREREQ
linux-user: remove GNUC check
compiler: remove GNUC check
xen: remove GNUC check
poison: remove GNUC check
compiler.h: explicit case for Clang printf attribute
virtiofsd: replace _Static_assert with QEMU_BUILD_BUG_ON
tests: remove GCC < 4 fallbacks
qemu-plugin.h: remove GCC < 4
compiler.h: remove GCC < 3 __builtin_expect fallback
accel/tcg: Remove special case for GCC < 4.6
qemu/atomic: Drop special case for unsupported compiler
hw/core: Restrict 'fw-path-provider.c' to system mode emulation
docs: set CONFDIR when running sphinx
vl: rename local variable in configure_accelerators
qemu-option: pass QemuOptsList to opts_accepts_any
qemu-option: simplify search for end of key
kvm: Take into account the unaligned section size when preparing bitmap
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
# softmmu/vl.c

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tests: remove GCC < 4 fallbacks

Since commit efc6c07 ("configure: Add a test for the minimum compiler
version"), QEMU explicitely depends on GCC >= 4.8.

(clang >= 3.4 advertizes itself as GCC >= 4.

tests: remove GCC < 4 fallbacks

Since commit efc6c07 ("configure: Add a test for the minimum compiler
version"), QEMU explicitely depends on GCC >= 4.8.

(clang >= 3.4 advertizes itself as GCC >= 4.2 compatible)

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20201210134752.780923-6-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-testing-revivial-210618-2' into staging

Add check-tcg machinary

This restores the ability to run TCG smoke tests by using our docker
infr

Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-testing-revivial-210618-2' into staging

Add check-tcg machinary

This restores the ability to run TCG smoke tests by using our docker
infrastructure to support cross building simple tests. It represents
the first step to making better cross-architecture testing available
straight from the source tree ;-)

v2
- fix quoting of target_compiler
- make docker.py Py3 safe
- tweak .travis.yml recipe
- don't probe docker when HAVE_USER_DOCKER not set

# gpg: Signature made Thu 21 Jun 2018 07:23:45 BST
# gpg: using RSA key FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>"
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-tcg-testing-revivial-210618-2: (57 commits)
.travis.yml: add check-tcg test
tests/docker/Makefile.include: only force SID to NOCACHE if old
docker: docker.py adding age check command
tests/Makefile: call sub-makes with SKIP_DOCKER_BUILD=1
docker: docker.py add check sub-command
docker: docker.py don't conflate checksums for extra_files
docker: docker.py use "version" to probe usage
tests: add top-level make dependency for docker builds
tests/tcg/i386: extend timeout for runcom test
tests/tcg: override runners for broken tests
tests/tcg: add run, diff, and skip helper macros
tests/Makefile.include: add [build|clean|check]-tcg targets
Makefile.target: add (clean-/build-)guest-tests targets
tests/tcg/Makefile: update to be called from Makefile.target
tests/tcg: enable building for PowerPC
docker: move debian-powerpc-cross to sid based build
tests/tcg: enable building for RISCV64
tests/tcg: enable building for mips64
tests/tcg: enable building for sparc64
tests/tcg: enable building for sh4
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/arm: add fcvt test cases for AArch32/64

This runs through the usual float to float conversions and crucially
also runs with ARM Alternative Half Precision Format.

Signed-off-by: Alex Benn

tests/tcg/arm: add fcvt test cases for AArch32/64

This runs through the usual float to float conversions and crucially
also runs with ARM Alternative Half Precision Format.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...