Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200305' into staging

* versal: Implement ADMA
* Implement (trivially) ARMv8.2-TTCNP
* hw/arm/smmu-common: a fix to smmu_find_

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200305' into staging

* versal: Implement ADMA
* Implement (trivially) ARMv8.2-TTCNP
* hw/arm/smmu-common: a fix to smmu_find_smmu_pcibus
* Remove unnecessary endianness-handling on some boards
* Avoid minor memory leaks from timer_new in some devices
* Honour more of the HCR_EL2 trap bits
* Complain rather than ignoring bad command line options for cubieboard
* Honour TBI for DC ZVA and exception return

# gpg: Signature made Thu 05 Mar 2020 16:30:17 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200305: (37 commits)
target/arm: Clean address for DC ZVA
target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva
target/arm: Move helper_dc_zva to helper-a64.c
target/arm: Apply TBI to ESR_ELx in helper_exception_return
target/arm: Introduce core_to_aa64_mmu_idx
target/arm: Optimize cpu_mmu_index
target/arm: Replicate TBI/TBID bits for single range regimes
hw/arm/cubieboard: report error when using unsupported -bios argument
hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB
hw/arm/cubieboard: restrict allowed CPU type to ARM Cortex-A8
hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition
tests/tcg/aarch64: Add newline in pauth-1 printf
target/arm: Honor the HCR_EL2.TTLB bit
target/arm: Honor the HCR_EL2.TPU bit
target/arm: Honor the HCR_EL2.TPCP bit
target/arm: Honor the HCR_EL2.TACR bit
target/arm: Honor the HCR_EL2.TSW bit
target/arm: Honor the HCR_EL2.{TVM,TRVM} bits
target/arm: Improve masking in arm_hcr_el2_eff
target/arm: Remove EL2 and EL3 setup from user-only
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/aarch64: Add newline in pauth-1 printf

Make the output just a bit prettier when running by hand.

Cc: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henders

tests/tcg/aarch64: Add newline in pauth-1 printf

Make the output just a bit prettier when running by hand.

Cc: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200229012811.24129-13-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200123-4' into staging

target-arm queue:
* fix bug in PAuth emulation
* add PMU to Cortex-R5, Cortex-R5F
* qemu-nbd: Convert

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200123-4' into staging

target-arm queue:
* fix bug in PAuth emulation
* add PMU to Cortex-R5, Cortex-R5F
* qemu-nbd: Convert documentation to rST
* qemu-block-drivers: Convert documentation to rST
* Fix Exynos4210 UART DMA support
* Various minor code cleanups

# gpg: Signature made Thu 23 Jan 2020 16:35:38 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200123-4:
hw/arm/exynos4210: Connect serial port DMA busy signals with pl330
hw/char/exynos4210_uart: Add receive DMA support
hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts
hw/char/exynos4210_uart: Implement post_load function
hw/char/exynos4210_uart: Convert to support tracing
hw/arm/exynos4210: Fix DMA initialization
hw/core/or-irq: Increase limit of or-lines to 48
dma/pl330: Convert to support tracing
hw/misc/stm32f4xx_syscfg: Fix copy/paste error
target/arm/arch_dump: Add SVE notes
qemu-block-drivers: Convert to rST
docs: Create stub system manual
qemu-nbd: Convert invocation documentation to rST
hw/arm: Use helper function to trigger hotplug handler plug
hw/acpi: Remove extra indent in ACPI GED hotplug cb
tests/tcg/aarch64: Add pauth-4
tests/tcg/aarch64: Add pauth-3
tests/tcg/aarch64: Fix compilation parameters for pauth-%
target/arm: Fix PAuth sbox functions
target/arm: add PMU feature to cortex-r5 and cortex-r5f

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/aarch64: Fix compilation parameters for pauth-%

We were incorrectly requiring ARMv8.4 support for the pauth
tests, but Pointer Authentication is an ARMv8.3 extension.
Further, hiding the r

tests/tcg/aarch64: Fix compilation parameters for pauth-%

We were incorrectly requiring ARMv8.4 support for the pauth
tests, but Pointer Authentication is an ARMv8.3 extension.
Further, hiding the required architecture within asm() is
not correct.

Correct the architecture version requested, and specify it
in the cflags of the (cross-) compiler rather than in the asm.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200116230809.19078-3-richard.henderson@linaro.org
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-for-4.0-120319-1' into staging

Final testing fixes for 4.0

- various CI tweaks and fixes
- fixes for some tcg tests
- addition

Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-for-4.0-120319-1' into staging

Final testing fixes for 4.0

- various CI tweaks and fixes
- fixes for some tcg tests
- addition of system tcg tests

# gpg: Signature made Tue 12 Mar 2019 17:07:24 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-for-4.0-120319-1: (26 commits)
.travis.yml: add softmmu check-tcg tests
.travis.yml: separate softfloat from check-tcg
tests/tcg/arm: account for pauth randomness
tests/tcg/i386: add memory test to exercise softmmu
tests/tcg/i386: add system mode Hello World test
tests/tcg: provide a minilib for system tests
tests/tcg: enable cris base user-mode tests
tests/tcg/cris: align mul operations
tests/tcg/cris: comment out the ccs test
tests/tcg: split cris tests into bare and libc directories
tests/tcg/cris: cleanup sys.c
tests/docker: add fedora-cris-cross compilers
tests/tcg/arm: add ARMv6-M UNDEFINED 32-bit instruction test
tests/tcg/xtensa: enable system tests
tests/docker: add debian-xtensa-cross image
tests/tcg/mips: fix hello-mips compilation
tests/tcg: add gdb runner variant
tests/tcg: split run-test into user and system variants
tests/tcg: add QEMU_OPT option for test runner
tests/tcg: enable tcg tests for softmmu
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/arm: account for pauth randomness

Pointer authentication isn't guaranteed to always detect a clash
between different keys. Take this into account in the test by running
several times and c

tests/tcg/arm: account for pauth randomness

Pointer authentication isn't guaranteed to always detect a clash
between different keys. Take this into account in the test by running
several times and checking the percentage hit rate of the test.

Cc: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190205' into staging

target-arm queue:
* Implement Armv8.5-BTI extension for system emulation mode
* Implement the PR_PAC_RESE

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190205' into staging

target-arm queue:
* Implement Armv8.5-BTI extension for system emulation mode
* Implement the PR_PAC_RESET_KEYS prctl() for linux-user mode's Armv8.3-PAuth support
* Support TBI (top-byte-ignore) properly for linux-user mode
* gdbstub: allow killing QEMU via vKill command
* hw/arm/boot: Support DTB autoload for firmware-only boots
* target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI

# gpg: Signature made Tue 05 Feb 2019 17:04:22 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20190205: (22 commits)
target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI
hw/arm/boot: Support DTB autoload for firmware-only boots
hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set env->boot_info
hw/arm/boot: Factor out "set up firmware boot" code
hw/arm/boot: Factor out "direct kernel boot" code into its own function
hw/arm/boot: Fix block comment style in arm_load_kernel()
gdbstub: allow killing QEMU via vKill command
target/arm: Enable TBI for user-only
target/arm: Compute TB_FLAGS for TBI for user-only
target/arm: Clean TBI for data operations in the translator
target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore
tests/tcg/aarch64: Add pauth smoke test
linux-user: Implement PR_PAC_RESET_KEYS
target/arm: Enable BTI for -cpu max
target/arm: Set btype for indirect branches
target/arm: Reset btype for direct branches
target/arm: Default handling of BTYPE during translation
target/arm: Cache the GP bit for a page in MemTxAttrs
exec: Add target-specific tlb bits to MemTxAttrs
target/arm: Add BT and BTYPE to tb->flags
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/aarch64: Add pauth smoke test

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190201195404.30486-3-richard.h

tests/tcg/aarch64: Add pauth smoke test

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190201195404.30486-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...