Merge tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu into staging

Updates for testing, plugins, gdbstub

- restore some 32 bit host builds and testing
- move some physm

Merge tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu into staging

Updates for testing, plugins, gdbstub

- restore some 32 bit host builds and testing
- move some physmem tracepoint definitions
- use --userns keep-id for podman builds
- cleanup check-tcg compiler flag checking for Arm
- fix some casting in fcvt test
- tweak check-tcg inline asm for clang
- suppress some invalid clang warnings
- disable KVM for the TCI builds
- improve the insn tracking plugin
- cleanups to the lockstep plugin
- free plugin data on cpu finalise
- assert cpu->index assigned
- move qemu_plugin_vcpu_init__async into plugin code
- add support for dynamic gdb command tables
- allow targets to extend gdb capabilities
- enable user-mode MTE support

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# =9Gmk
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 Jul 2024 04:49:05 AM PDT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]

* tag 'pull-maintainer-july24-050724-1' of https://gitlab.com/stsquad/qemu: (40 commits)
tests/tcg/aarch64: Add MTE gdbstub tests
gdbstub: Add support for MTE in user mode
gdbstub: Use true to set cmd_startswith
gdbstub: Pass CPU context to command handler
gdbstub: Make hex conversion function non-internal
target/arm: Factor out code for setting MTE TCF0 field
target/arm: Make some MTE helpers widely available
target/arm: Fix exception case in allocation_tag_mem_probe
gdbstub: Add support for target-specific stubs
gdbstub: Move GdbCmdParseEntry into a new header file
gdbstub: Clean up process_string_cmd
accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/
plugins: Free CPUPluginState before destroying vCPU state
plugins: Ensure vCPU index is assigned in init/exit hooks
plugins/lockstep: clean-up output
plugins/lockstep: mention the one-insn-per-tb option
plugins/lockstep: make mixed-mode safe
plugins/lockstep: preserve sock_path
test/plugins: preserve the instruction record over translations
test/plugin: make insn plugin less noisy by default
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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tests/tcg/aarch64: Fix irg operand type

irg expects 64-bit integers. Passing a 32-bit integer results in
compilation failure with clang version 18.1.6.

Signed-off-by: Akihiko Odaki <akihiko.odaki@d

tests/tcg/aarch64: Fix irg operand type

irg expects 64-bit integers. Passing a 32-bit integer results in
compilation failure with clang version 18.1.6.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240627-tcg-v2-4-1690a813348e@daynix.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20240630190050.160642-6-richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240705084047.857176-11-alex.bennee@linaro.org>

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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210217' into staging

target-arm queue:
* Support ARMv8.5-MemTag for linux-user
* ncpm7xx: Support SMBus
* MAINTAINERS: add se

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210217' into staging

target-arm queue:
* Support ARMv8.5-MemTag for linux-user
* ncpm7xx: Support SMBus
* MAINTAINERS: add section for Clock framework

# gpg: Signature made Wed 17 Feb 2021 11:01:45 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210217: (37 commits)
MAINTAINERS: add myself maintainer for the clock framework
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
hw/i2c: Add a QTest for NPCM7XX SMBus Device
hw/arm: Add I2C sensors and EEPROM for GSJ machine
hw/arm: Add I2C sensors for NPCM750 eval board
hw/i2c: Implement NPCM7XX SMBus Module Single Mode
tests/tcg/aarch64: Add mte smoke tests
target/arm: Enable MTE for user-only
target/arm: Add allocation tag storage for user mode
linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
linux-user/aarch64: Pass syndrome to EXC_*_ABORT
target/arm: Split out syndrome.h from internals.h
linux-user/aarch64: Implement PROT_MTE
linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
target/arm: Use the proper TBI settings for linux-user
target/arm: Improve gen_top_byte_ignore
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
linux-user: Handle tags in lock_user/unlock_user
linux-user: Fix types in uaccess.c
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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tests/tcg/aarch64: Add mte smoke tests

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-32-ric

tests/tcg/aarch64: Add mte smoke tests

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...