Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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47d38784 |
| 05-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging
softfloat: Fix the incorrect computation in float32_exp2 tcg: Remove compatability helpers for qemu ld/st target/alpha:
Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging
softfloat: Fix the incorrect computation in float32_exp2 tcg: Remove compatability helpers for qemu ld/st target/alpha: Remove TARGET_ALIGNED_ONLY target/hppa: Remove TARGET_ALIGNED_ONLY target/sparc: Remove TARGET_ALIGNED_ONLY tcg: Cleanups preparing to unify calls to qemu_ld/st helpers
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRVc9UdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9OiAgAgwc6wFOzFtSnYrvH # b9YgcJLPX8urgx9g1Exv553hbVtt2J0lsLAhlgwKpms3Os4p6znKhUWcGosHFixO # eBQFqcS22Cu/ZM2s6299GOGDpxCpjx0/bX7JJTjW805SdSgDAuEUIbKe0ZqQT5tx # ++F9is2+plp95/BeQz2+hbkbbpdktUkkk288Adoz3KRHqt/zd8cer0WrqR2uVAuX # swpEluwtCfaewc0iPcNjlp9rLzO882wCFm0RG1EC2j9NHtq8O8xyamM9PPEaRXLv # MiMA2nB6hsGMz33Wuec8cZTMaCLB+Oqhbq7eYPbCA4SmJBE3V9Rgc7GL4B7yCsyI # OXSK+Q== # =GIXd # -----END PGP SIGNATURE----- # gpg: Signature made Fri 05 May 2023 10:23:33 PM BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu: (42 commits) tcg: Widen helper_*_st[bw]_mmu val arguments tcg: Introduce arg_slot_stk_ofs tcg: Replace REG_P with arg_loc_reg_p tcg: Move TCGLabelQemuLdst to tcg.c tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st} tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return tcg/s390x: Introduce HostAddress tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st} tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st} tcg/riscv: Require TCG_TARGET_REG_BITS == 64 tcg/ppc: Introduce HostAddress tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st} tcg/mips: Rationalize args to tcg_out_qemu_{ld,st} tcg/loongarch64: Introduce HostAddress tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st} tcg/arm: Introduce HostAddress tcg/arm: Rationalize args to tcg_out_qemu_{ld,st} tcg/aarch64: Introduce HostAddress tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st} tcg/i386: Introduce tcg_out_testi ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0 |
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2528f771 |
| 07-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move TCGLabelQemuLdst to tcg.c
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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327ec8d6 |
| 23-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230423' of https://gitlab.com/rth7680/qemu into staging
tcg cleanups: - Remove tcg_abort() - Split out extensions as known backend interfaces - Put the separate extension
Merge tag 'pull-tcg-20230423' of https://gitlab.com/rth7680/qemu into staging
tcg cleanups: - Remove tcg_abort() - Split out extensions as known backend interfaces - Put the separate extensions together as tcg_out_movext - Introduce tcg_out_xchg as a backend interface - Clear TCGLabelQemuLdst on allocation - Avoid redundant extensions for riscv
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRE69sdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/6jQf6Al9cgeJ6guVMpoRS # +sXaTs5U2yaqRvz5gGn2ANFuFgD2QanbWHjS5guTnhbsvq3icyOCpIXIPg/Z04LB # fTgAUCF5ut8U8C12HyGq/p4BFoTTWnCGPwY+PB9pMb5LiEcmaSUUz+fSA8xMX1b6 # EylI8YNd74A9j5PBNbGIXooj8llM71p9YztwQ9V7sPH3ZON4qbPRDgrJsb5TngMa # daTpGoW+A9UyG7z0Ie6UuiOyYAzeQqm64WmMlc7UYeb9lL+yxvCq4+MXH2V/SKqg # GLOF95DCdqj1EeZCOt0aN1ybZPcYFFkmpXrD1iLu0Mhy7Qo/vghX/eFoFnLleD+Y # yM+LTg== # =d2hZ # -----END PGP SIGNATURE----- # gpg: Signature made Sun 23 Apr 2023 09:27:07 AM BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230423' of https://gitlab.com/rth7680/qemu: tcg/riscv: Conditionalize tcg_out_exts_i32_i64 tcg: Clear TCGLabelQemuLdst on allocation tcg: Introduce tcg_out_xchg tcg: Introduce tcg_out_movext tcg: Split out tcg_out_extrl_i64_i32 tcg: Split out tcg_out_extu_i32_i64 tcg: Split out tcg_out_exts_i32_i64 tcg: Split out tcg_out_ext32u tcg: Split out tcg_out_ext32s tcg: Split out tcg_out_ext16u tcg: Split out tcg_out_ext16s tcg: Split out tcg_out_ext8u tcg: Split out tcg_out_ext8s tcg: Replace tcg_abort with g_assert_not_reached tcg: Replace if + tcg_abort with tcg_debug_assert
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4745b156 |
| 06-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Clear TCGLabelQemuLdst on allocation
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.2.0, v7.0.0, v6.2.0 |
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6723ff63 |
| 06-Oct-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211006' into staging
More fixes for fedora-i386-cross Add dup_const_tl Expand MemOp MO_SIZE Move MemOpIdx out of tcg.h Vector support for tc
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211006' into staging
More fixes for fedora-i386-cross Add dup_const_tl Expand MemOp MO_SIZE Move MemOpIdx out of tcg.h Vector support for tcg/s390x
# gpg: Signature made Wed 06 Oct 2021 08:12:53 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* remotes/rth/tags/pull-tcg-20211006: (28 commits) tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec tcg/s390x: Implement TCG_TARGET_HAS_sat_vec tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec tcg/s390x: Implement vector shift operations tcg/s390x: Implement TCG_TARGET_HAS_mul_vec tcg/s390x: Implement andc, orc, abs, neg, not vector operations tcg/s390x: Implement minimal vector operations tcg/s390x: Implement tcg_out_dup*_vec tcg/s390x: Implement tcg_out_mov for vector types tcg/s390x: Implement tcg_out_ld/st for vector types tcg/s390x: Add host vector framework tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg tcg/s390x: Change FACILITY representation tcg/s390x: Rename from tcg/s390 tcg: Expand usadd/ussub with umin/umax hw/core/cpu: Re-sort the non-pointers to the end of CPUClass trace: Split guest_mem_before plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb accel/tcg: Pass MemOpIdx to atomic_trace_*_post ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v6.1.0 |
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9002ffcb |
| 25-Jul-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Rename TCGMemOpIdx to MemOpIdx
We're about to move this out of tcg.h, so rename it as we did when moving MemOp.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe M
tcg: Rename TCGMemOpIdx to MemOpIdx
We're about to move this out of tcg.h, so rename it as we did when moving MemOp.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e79de63a |
| 07-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging
Build fix for ppc64 centos7. Reduce the use of scratch registers for tcg/i386. Use _aligned_malloc for Win32. En
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging
Build fix for ppc64 centos7. Reduce the use of scratch registers for tcg/i386. Use _aligned_malloc for Win32. Enable split w^x code gen buffers.
# gpg: Signature made Thu 07 Jan 2021 20:06:38 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210107: (47 commits) tcg: Constify TCGLabelQemuLdst.raddr tcg: Constify tcg_code_gen_epilogue tcg: Remove TCG_TARGET_SUPPORT_MIRROR tcg/arm: Support split-wx code generation tcg/mips: Support split-wx code generation tcg/mips: Do not assert on relocation overflow accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd tcg/riscv: Support split-wx code generation tcg/riscv: Remove branch-over-branch fallback tcg/riscv: Fix branch range checks tcg/s390: Support split-wx code generation tcg/s390: Use tcg_tbrel_diff tcg/sparc: Support split-wx code generation tcg/sparc: Use tcg_tbrel_diff tcg/ppc: Support split-wx code generation tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB tcg/ppc: Use tcg_tbrel_diff tcg: Introduce tcg_tbrel_diff tcg/tci: Push const down through bytecode reading disas: Push const down through host disassembly ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.2.0 |
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e5e2e4c7 |
| 05-Nov-2020 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Constify TCGLabelQemuLdst.raddr
Now that all native tcg hosts support splitwx, make this pointer const.
Reviewed-by: Joelle van Dyne <j@getutm.app> Reviewed-by: Philippe Mathieu-Daudé <f4bug@a
tcg: Constify TCGLabelQemuLdst.raddr
Now that all native tcg hosts support splitwx, make this pointer const.
Reviewed-by: Joelle van Dyne <j@getutm.app> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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7fd51e68 |
| 21-Aug-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit te
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit tests * converting some remaining parts of the installation
# gpg: Signature made Fri 21 Aug 2020 11:33:35 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (152 commits) docs: convert build system documentation to rST meson: update build-system documentation meson: avoid unstable module warning with Meson 0.56.0 or newer meson: convert po/ meson: convert VNC and dependent libraries to meson meson: move SDL and SDL-image detection to meson meson: convert sample plugins meson: replace create-config with meson configure_file rules.mak: drop unneeded macros meson: convert check-block meson: build texi doc docs: automatically track manual dependencies meson: sphinx-build remove Makefile.target rules.mak: remove version.o meson: convert systemtap files configure: place compatibility symlinks in target directories meson: link emulators without Makefile.target meson: plugins meson: cpu-emu ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.0.0 |
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139c1837 |
| 04-Feb-2020 |
Paolo Bonzini <pbonzini@redhat.com> |
meson: rename included C source files to .c.inc
With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built
meson: rename included C source files to .c.inc
With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built before everything else and they are available when first building the .c files.
Alternatively you can use a fine-grained dependency, e.g.
target/arm/translate.o: target/arm/decode-neon-shared.inc.c
With Meson you have only one choice and it is a third option, namely "build at the beginning of the corresponding target"; the way you express it is to list the includes in the sources of that target.
The problem is that Meson decides if something is a source vs. a generated include by looking at the extension: '.c', '.cc', '.m', '.C' are sources, while everything else is considered an include---including '.inc.c'.
Use '.c.inc' to avoid this, as it is consistent with our other convention of using '.rst.inc' for included reStructuredText files. The editorconfig file is adjusted.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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