History log of /openbmc/qemu/target/xtensa/core-dsp3400/core-matmap.h (Results 1 – 4 of 4)
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Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0, v7.2.0
# ec11dc41 11-May-2022 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging

Miscellaneous patches patches for 2022-05-11

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Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging

Miscellaneous patches patches for 2022-05-11

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# gpg: Signature made Wed 11 May 2022 07:58:10 AM PDT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [undefined]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653

* tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru:
Clean up decorations and whitespace around header guards
Normalize header guard symbol definition
Clean up ill-advised or unusual header guards
Clean up header guards that don't match their file name

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# ea9cea93 06-May-2022 Markus Armbruster <armbru@redhat.com>

Clean up decorations and whitespace around header guards

Cleaned up with scripts/clean-header-guards.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-5-a

Clean up decorations and whitespace around header guards

Cleaned up with scripts/clean-header-guards.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-5-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

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Revision tags: v7.0.0, v6.2.0, v6.1.0, v5.2.0
# 44423107 24-Aug-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into staging

target/xtensa updates for 5.2:

- add NMI support;
- add DFPU option implementation;
- update FPU tests to support bot

Merge remote-tracking branch 'remotes/xtensa/tags/20200821-xtensa' into staging

target/xtensa updates for 5.2:

- add NMI support;
- add DFPU option implementation;
- update FPU tests to support both FPU2000 and DFPU;
- add example cores with FPU2000 and DFPU.

# gpg: Signature made Fri 21 Aug 2020 21:09:37 BST
# gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg: issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20200821-xtensa: (24 commits)
target/xtensa: import DSP3400 core
target/xtensa: import de233_fpu core
tests/tcg/xtensa: add DFP0 arithmetic tests
tests/tcg/xtensa: test double precision load/store
tests/tcg/xtensa: add fp0 div and sqrt tests
tests/tcg/xtensa: update test_lsc for DFPU
tests/tcg/xtensa: update test_fp1 for DFPU
tests/tcg/xtensa: update test_fp0_conv for DFPU
tests/tcg/xtensa: expand madd tests
tests/tcg/xtensa: update test_fp0_arith for DFPU
tests/tcg/xtensa: fix test execution on ISS
target/xtensa: implement FPU division and square root
target/xtensa: add DFPU registers and opcodes
target/xtensa: add DFPU option
target/xtensa: don't access BR regfile directly
target/xtensa: move FSR/FCR register accessors
target/xtensa: rename FPU2000 translators and helpers
target/xtensa: support copying registers up to 64 bits wide
target/xtensa: add geometry to xtensa_get_regfile_by_name
softfloat: add xtensa specialization for pickNaNMulAdd
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# c621b414 30-Jun-2020 Max Filippov <jcmvbkbc@gmail.com>

target/xtensa: import DSP3400 core

DSP3400 is a DSP core with FPU2000 option.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>