Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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3b2fe44b |
| 29-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-request-2024-05-29' of https://gitlab.com/thuth/qemu into staging
* Fix and improve PER emulation on s390x * Fix problems of the build-oss-fuzz CI job * Fix broken update-linux-heade
Merge tag 'pull-request-2024-05-29' of https://gitlab.com/thuth/qemu into staging
* Fix and improve PER emulation on s390x * Fix problems of the build-oss-fuzz CI job * Fix broken update-linux-headers.sh script * Fixes for compiling with -fsanitize=undefined on latest Clang versions
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* tag 'pull-request-2024-05-29' of https://gitlab.com/thuth/qemu: (22 commits) qapi: Do not cast function pointers lockable: Do not cast function pointers qemu-keymap: Make references to allocations static scripts/update-linux-headers.sh: Fix the path of setup_data.h scripts/update-linux-headers.sh: Remove temporary directory inbetween hw/s390x: Remove unused macro VMSTATE_ADAPTER_ROUTES fuzz: disable leak-detection for oss-fuzz builds fuzz: specify audiodev for usb-audio tests/tcg/s390x: Add per.S target/s390x: Adjust check of noreturn in translate_one target/s390x: Simplify per_ifetch, per_check_exception target/s390x: Fix helper_per_ifetch flags target/s390x: Raise exception from per_store_real target/s390x: Raise exception from helper_per_branch target/s390x: Split per_breaking_event from per_branch_* target/s390x: Simplify help_branch target/s390x: Introduce help_goto_indirect target/s390x: Disable conditional branch-to-next for PER target/s390x: Record separate PER bits in TB flags target/s390x: Update CR9 bits ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a47d08ee |
| 02-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Simplify per_ifetch, per_check_exception
Set per_address and ilen in per_ifetch; this is valid for all PER exceptions and will last until the end of the instruction. Therefore we don'
target/s390x: Simplify per_ifetch, per_check_exception
Set per_address and ilen in per_ifetch; this is valid for all PER exceptions and will last until the end of the instruction. Therefore we don't need to give the same data to per_check_exception.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-13-richard.henderson@linaro.org> [thuth: Silence checkpatch.pl errors] Signed-off-by: Thomas Huth <thuth@redhat.com>
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67b765d3 |
| 02-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Fix helper_per_ifetch flags
CPU state is read on the exception path.
Fixes: 83bb161299c ("target-s390x: PER instruction-fetch nullification event support") Signed-off-by: Richard Hend
target/s390x: Fix helper_per_ifetch flags
CPU state is read on the exception path.
Fixes: 83bb161299c ("target-s390x: PER instruction-fetch nullification event support") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20240502054417.234340-12-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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31b2d4a1 |
| 02-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Raise exception from per_store_real
At this point the instruction is complete and there's nothing left to do but raise the exception. With this change we need not make two helper call
target/s390x: Raise exception from per_store_real
At this point the instruction is complete and there's nothing left to do but raise the exception. With this change we need not make two helper calls for this event.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-11-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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53313396 |
| 02-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Raise exception from helper_per_branch
Drop from argument, since gbea has always been updated with this address. Add ilen argument for setting int_pgm_ilen. Use update_cc_op before ca
target/s390x: Raise exception from helper_per_branch
Drop from argument, since gbea has always been updated with this address. Add ilen argument for setting int_pgm_ilen. Use update_cc_op before calling per_branch.
By raising the exception here, we need not call per_check_exception later, which means we can clean up the normal non-exception branch path.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-10-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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a6a33760 |
| 02-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Do not use unwind for per_check_exception
Using exception unwind via tcg_s390_program_interrupt, we discard the current value of psw.addr, which discards the result of a branch.
Pass
target/s390x: Do not use unwind for per_check_exception
Using exception unwind via tcg_s390_program_interrupt, we discard the current value of psw.addr, which discards the result of a branch.
Pass in the address of the next instruction, which may not be sequential. Pass in ilen, which we would have gotten from unwind and is passed to the exception handler. Sync cc_op before the call, which we would have gotten from unwind.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240502054417.234340-2-richard.henderson@linaro.org> [thuth: Silence checkpatch.pl errors] Signed-off-by: Thomas Huth <thuth@redhat.com>
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9e34f127 |
| 08-Feb-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-request-2024-02-06' of https://gitlab.com/thuth/qemu into staging
* Emulate CVB, CVBY, CVBG and CVDG s390x instructions * Fix bug in lsi53c895a reentrancy counter * Deprecate the "po
Merge tag 'pull-request-2024-02-06' of https://gitlab.com/thuth/qemu into staging
* Emulate CVB, CVBY, CVBG and CVDG s390x instructions * Fix bug in lsi53c895a reentrancy counter * Deprecate the "power5+" and "power7+" CPU names * Fix problems in the freebsd VM test
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* tag 'pull-request-2024-02-06' of https://gitlab.com/thuth/qemu: meson: Link with libinotify on FreeBSD test-util-filemonitor: Adapt to the FreeBSD inotify rename semantics tests/vm/freebsd: Reload the sshd configuration tests/vm: Set UseDNS=no in the sshd configuration target/s390x: Prefer fast cpu_env() over slower CPU QOM cast macro tests/tcg/s390x: Test CONVERT TO BINARY tests/tcg/s390x: Test CONVERT TO DECIMAL target/s390x: Emulate CVB, CVBY and CVBG target/s390x: Emulate CVDG docs/about: Deprecate the old "power5+" and "power7+" CPU names target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules hw/scsi/lsi53c895a: add missing decrement of reentrancy counter
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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b4b8d58e |
| 05-Feb-2024 |
Ilya Leoshkevich <iii@linux.ibm.com> |
target/s390x: Emulate CVB, CVBY and CVBG
Convert to Binary - counterparts of the already implemented Convert to Decimal (CVD*) instructions. Example from the Principles of Operation: 25594C becomes
target/s390x: Emulate CVB, CVBY and CVBG
Convert to Binary - counterparts of the already implemented Convert to Decimal (CVD*) instructions. Example from the Principles of Operation: 25594C becomes 63FA.
Co-developed-by: Pavel Zbitskiy <pavel.zbitskiy@gmail.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240205205830.6425-3-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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a6e55a82 |
| 05-Feb-2024 |
Ilya Leoshkevich <iii@linux.ibm.com> |
target/s390x: Emulate CVDG
CVDG is the same as CVD, except that it converts 64 bits into 128, rather than 32 into 64. Create a new helper, which uses Int128 wrappers.
Reported-by: Ido Plat <Ido.Pla
target/s390x: Emulate CVDG
CVDG is the same as CVD, except that it converts 64 bits into 128, rather than 32 into 64. Create a new helper, which uses Int128 wrappers.
Reported-by: Ido Plat <Ido.Plat@ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240205205830.6425-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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8d309a3a |
| 10-Jul-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-request-2023-07-10v2' of https://gitlab.com/thuth/qemu into staging
* s390x instruction emulation fixes and corresponding TCG tests * Extend the readconfig qtest * Introduce "-run-wi
Merge tag 'pull-request-2023-07-10v2' of https://gitlab.com/thuth/qemu into staging
* s390x instruction emulation fixes and corresponding TCG tests * Extend the readconfig qtest * Introduce "-run-with chroot=..." and deprecate the old "-chroot" option * Speed up migration tests * Fix coding style in the coding style document
# -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmSsCYQRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbUhLw/+Mg74FGODwb/kdPSSY+ahEmutRaQG5z74 # zWnHFYTB0xLRxu5gwV09wcFt88RjkkdsKORtp1LBRahVaKYzYSq3PxMYsDii2pdr # Ma58RLZC/42shrzZmXEyl3ilxCCHjq2UCezX+4ca/zuTl/83znVN6Mrq28GUmp7v # 8yI78mPpZXEkLEN3cnnK3v7AsLwz439aHd3ADZ1IWUohGHQdDAj4nn5Yxp4SeIUj # sOmCcEfLj3emNM/TTL2suohuZNwYjyLQ5iqQJ/B7v/S88PbWQUA9Cq/KpEGBLk/D # fxDjbQ7+zpTTSQ+XihShtGdEnl4uPPixvJX43vriYDBQFsHKS7Y38cSAFVTDrQvh # 4fELCAPg8wXeoyMu7WZWINDA6dVdInCdmljHYpK+mQg7AtHu/CliPWzVUZyeW3XD # lwybNCoyJQcA4KPAyYrkau74JrLRGtLJJQ5XtQEDsK791xjeHt1hr42QY4YeHyjM # Utf6inp4D7RZ3O9p5EeKNVpFin5AE+RTvNZKLJicFRb0hFziUkCK61nRwS5gmvXA # I41av1L+mLI7jvu0M2ID1CfIhFf+/w4GKNkUlcutux7uz5mzxIj0oifsONEZGNo+ # NlVKKNxfQv2eRl+9sZPWNl8q11K3bvZbpvXZS5oSLIererWIIROaxcgzxpU+EGLT # 8HhF7RZdO8w= # =LLmM # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Jul 2023 02:37:08 PM BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-07-10v2' of https://gitlab.com/thuth/qemu: (21 commits) docs/devel: Fix coding style in style.rst tests/qtest: massively speed up migration-test tests/tcg/s390x: Fix test-svc with clang meson.build: Skip C++ detection unless we're targeting Windows os-posix: Allow 'chroot' via '-run-with' and deprecate the old '-chroot' option tests/qtest/readconfig: Test the docs/config/q35-*.cfg files tests/qtest: Move mkimg() and have_qemu_img() from libqos to libqtest tests/qtest/readconfig-test: Allow testing for arbitrary memory sizes tests/tcg/s390x: Test MVCRL with a large value in R0 tests/tcg/s390x: Test MDEB and MDEBR tests/tcg/s390x: Test LRA tests/tcg/s390x: Test LARL with a large offset tests/tcg/s390x: Test EPSW target/s390x: Fix relative long instructions with large offsets target/s390x: Fix LRA when DAT is off target/s390x: Fix LRA overwriting the top 32 bits on DAT error target/s390x: Fix MVCRL with a large value in R0 target/s390x: Fix MDEB and MDEBR target/s390x: Fix EPSW CC reporting linux-user: elfload: Add more initial s390x PSW bits ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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6da311a6 |
| 04-Jul-2023 |
Ilya Leoshkevich <iii@linux.ibm.com> |
target/s390x: Fix LRA overwriting the top 32 bits on DAT error
When a DAT error occurs, LRA is supposed to write the error information to the bottom 32 bits of R1, and leave the top 32 bits of R1 al
target/s390x: Fix LRA overwriting the top 32 bits on DAT error
When a DAT error occurs, LRA is supposed to write the error information to the bottom 32 bits of R1, and leave the top 32 bits of R1 alone.
Fix by passing the original value of R1 into helper and copying the top 32 bits to the return value.
Fixes: d8fe4a9c284f ("target-s390: Convert LRA") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Cc: qemu-stable@nongnu.org Message-Id: <20230704081506.276055-6-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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7ce5a15f |
| 06-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu into staging
* Fix emulated LCCB, LOCFHR, MXDB and MXDBR s390x instructions * Fix the malta machine on s390x (big endian) hosts *
Merge tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu into staging
* Fix emulated LCCB, LOCFHR, MXDB and MXDBR s390x instructions * Fix the malta machine on s390x (big endian) hosts * Emulate /proc/cpuinfo on s390x * Remove pointless QOM casts * Improve the inclusion logic for libkeyutils and ipmi-bt-test in meson.build
# -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmR+ycgRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbWXXw//WPz3ng50KLS+M1t3/ULEjO6XkGfP2LQZ # RsZq3hf9THFPZgcREk+6SQvttOSTuvHNfakfujS6U1Ou5thReWqLe4itFW6+hB5j # kQ+Sm6YJ+fpezkBnSefcUoL5nA9VVKZ6KE6kxq5CUBZNoIk1sSsfrU8y8wjzW0yg # 2nraOcG10aLpO2BfvKHVEAhJtwl9pHJsFANmHC2/h2wC9BZIAzdxiytzdcJ909gN # AAa0hIrLK/oFgJjkSSxu+QTaVGPARXqkx5WV546F/zmDMFUWd9nrXaegwqxjgPBN # m9Ua0SXll5hX2Z57vjJWlbTYkD+JUB22L0N7p5/xzhYRpLVSq1pdveo9psrzIC3E # Bt7chZB58acQepJHxxa3UHDOHcnfdfaN+Dd9wD29wHr7nK8lOcsen7/7V+5YXomc # qenkCtkpjKTl07OBxe6MDGZtPZYA8fK1CjEyYwHCe8QvxEzsyg96Bm3j4N2VPxQU # +f/sFPX7SgogZI4mB4wdoxOF1RmQ+DXQ2tnB970txZRkmFq2jJHpW86jkkbq2Jl1 # KIjgdIXjVgy+MPtuQzO5cT+jfhGQL7FQynGXHjv/UidBid5XD3TDVNa9AthN3Mng # +rPT90VJ7j9soMqvmNT1COSIRD+M49dQKBIQuq/gWplaTOHaAcJrCwYScwqe0u0P # zmjCNeuPVw8= # =dfJr # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 Jun 2023 10:53:12 PM PDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [unknown] # gpg: aka "Thomas Huth <thuth@redhat.com>" [unknown] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-06-06' of https://gitlab.com/thuth/qemu: linux-user: Emulate /proc/cpuinfo on s390x linux-user/elfload: Introduce elf_hwcap_str() on s390x linux-user/elfload: Expose get_elf_hwcap() on s390x s390x/tcg: Fix CPU address returned by STIDP bulk: Remove pointless QOM casts scripts: Add qom-cast-macro-clean-cocci-gen.py hw/mips/malta: Fix the malta machine on big endian hosts gitlab-ci: Remove unused Python package tests/qtest: Run ipmi-bt-test only if CONFIG_IPMI_EXTERN is set tests/tcg/s390x: Test MXDB and MXDBR target/s390x: Fix MXDB and MXDBR Add conditional dependency for libkeyutils tests/tcg/s390x: Test single-stepping SVC linux-user/s390x: Fix single-stepping SVC tests/tcg/s390x: Test LOCFHR target/s390x: Fix LOCFHR taking the wrong half of R2 tests/tcg/s390x: Test LCBB target/s390x: Fix LCBB overwriting the top 32 bits
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a7f4add7 |
| 01-Jun-2023 |
Ilya Leoshkevich <iii@linux.ibm.com> |
target/s390x: Fix MXDB and MXDBR
These instructions multiply 64 bits by 64 bits, not 128 bits by 64 bits.
Reported-by: Tulio Magno Quites Machado Filho <tuliom@redhat.com> Fixes: 2b91240f95fd ("tar
target/s390x: Fix MXDB and MXDBR
These instructions multiply 64 bits by 64 bits, not 128 bits by 64 bits.
Reported-by: Tulio Magno Quites Machado Filho <tuliom@redhat.com> Fixes: 2b91240f95fd ("target/s390x: Use Int128 for passing float128") Cc: qemu-stable@nongnu.org Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2211472 Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20230601223027.795501-2-iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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1c12355b |
| 23-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging
util: Host cpu detection for x86 and aa64 util: Use cpu detection for bufferiszero migration: Use cpu detection for xb
Merge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging
util: Host cpu detection for x86 and aa64 util: Use cpu detection for bufferiszero migration: Use cpu detection for xbzrle tcg: Replace and remove cpu_atomic_{ld,st}o* host/include: Split qemu/atomic128.h tcg: Remove DEBUG_DISAS tcg: Remove USE_TCG_OPTIMIZATIONS
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRtbwAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8xlgf7B/RnVG7u7Hjndr6h # fH07ujjElAivs+H05S0GGbQYpSNlqVv8PzXT2olJTAe15ryb537dCkqxyKW53vgb # pUWzZf9Zy8XfN48W5V91dSKQE3gm5wBlOM6LI85F8XrIQyjZqkHti+rw3GxsamNL # 8n2euOR0vx/jculBRxvZUAJDzb/0shN583mC5+wX/KInCHiNmMC6sCggyd5bpFJZ # 1wqWwrUCqJ0KAAYKd9WrIKt6QwAX3kUDiBQPa1g+psBjZ1CYQ4lqZZn9uYQ4hEtG # yBnT0ER2LOBQaKXJ0BrdG5c/mUNX7WkLBDTb+QjGGkfPc/bHIirXqeFzuyrXahg8 # kY155w== # =XH8Z # -----END PGP SIGNATURE----- # gpg: Signature made Tue 23 May 2023 06:57:20 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu: (28 commits) tcg: Remove USE_TCG_OPTIMIZATIONS tcg: Remove DEBUG_DISAS qemu/atomic128: Add runtime test for FEAT_LSE2 qemu/atomic128: Improve cmpxchg fallback for atomic16_set tcg: Split out tcg/debug-assert.h accel/tcg: Correctly use atomic128.h in ldst_atomicity.c.inc qemu/atomic128: Split atomic16_read accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128 accel/tcg: Remove prot argument to atomic_mmu_lookup accel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu target/s390x: Always use cpu_atomic_cmpxchgl_be_mmu in do_csst target/s390x: Use cpu_{ld,st}*_mmu in do_csst accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ include/qemu: Move CONFIG_ATOMIC128_OPT handling to atomic128.h meson: Fix detect atomic128 support with optimization include/host: Split out atomic128-ldst.h include/host: Split out atomic128-cas.h util: Add cpuinfo-aarch64.c ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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d54a20b9 |
| 19-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ
No need to roll our own, as this is now provided by tcg. This was the last use of retxl, so remove that too.
Reviewed-by: Alex Bennée <alex
target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ
No need to roll our own, as this is now provided by tcg. This was the last use of retxl, so remove that too.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0 |
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#
b5238812 |
| 04-Feb-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into staging
tcg: Add support for TCGv_i128 in parameters and returns. tcg: Add support for TCGv_i128 in cmpxchg. tcg: Test CPUJumpCa
Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into staging
tcg: Add support for TCGv_i128 in parameters and returns. tcg: Add support for TCGv_i128 in cmpxchg. tcg: Test CPUJumpCache in tb_jmp_cache_clear_page tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64} tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target target/arm: Use tcg_gen_atomic_cmpxchg_i128 target/i386: Use tcg_gen_atomic_cmpxchg_i128 target/i386: Use tcg_gen_nonatomic_cmpxchg_i{32,64} target/s390x: Use tcg_gen_atomic_cmpxchg_i128 target/s390x: Use TCGv_i128 in passing and returning float128 target/s390x: Implement CC_OP_NZ in gen_op_calc_cc
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmPeiDYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+hFQf+K1MkEK1wtpjnqrYD # 4l36Uo3B7w8Yi6FxbCx9NP78dJNNTjTn0zqhtISRKSzI7TGUCGnmQs40iqYrRe5S # 9x6LJgTJplI2dsANvtsTaWB5gNzhowPt5tlit+J6Q0POwvvwcBZAOumY8AYt1YP+ # dMsjBLw6HFaqSCU5IERZrB4kBwl61VTkTAtHL2utSZpdsOYoc3y2hzbJ/w3kLK2u # YXnMvom+Gc1rvQTaSMgiPYFITyx/VtXDe+JQwNikpu7Na+RFjtu7cHmg/BtZFo6s # 15AsAS8JlENKAunpJiX41UR7SxB8MdyQL5LyjVNWo5F7+YgQuuO1gqYKt6qUwd+A # oH2uBA== # =xjMy # -----END PGP SIGNATURE----- # gpg: Signature made Sat 04 Feb 2023 16:30:46 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu: (40 commits) tcg/aarch64: Fix patching of LDR in tb_target_set_jmp_target target/i386: Inline cmpxchg16b target/i386: Inline cmpxchg8b target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16b target/s390x: Implement CC_OP_NZ in gen_op_calc_cc target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG target/s390x: Use Int128 for passing float128 target/s390x: Use Int128 for returning float128 target/s390x: Copy wout_x1 to wout_x1_P target/s390x: Use Int128 for return from TRE target/s390x: Use Int128 for return from CKSM target/s390x: Use Int128 for return from CLST target/s390x: Use a single return for helper_divs64/u64 target/s390x: Use a single return for helper_divs32/u32 tests/tcg/s390x: Add cdsg.c tests/tcg/s390x: Add long-double.c tests/tcg/s390x: Add clst.c tests/tcg/s390x: Add div.c target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v7.2.0 |
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1fcd84fa |
| 08-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSG
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2b91240f |
| 20-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use Int128 for passing float128
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henders
target/s390x: Use Int128 for passing float128
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix SPEC_in1_x1.
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ee5e866f |
| 19-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use Int128 for returning float128
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.hende
target/s390x: Use Int128 for returning float128
Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Remove extraneous return_low128.
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ef45f5b9 |
| 20-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use Int128 for return from TRE
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderso
target/s390x: Use Int128 for return from TRE
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
c9119224 |
| 20-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use Int128 for return from CKSM
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henders
target/s390x: Use Int128 for return from CKSM
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b71dd2a5 |
| 20-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use Int128 for return from CLST
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henders
target/s390x: Use Int128 for return from CLST
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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4e5712f9 |
| 19-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use a single return for helper_divs64/u64
Pack the quotient and remainder into a single Int128. Use the divu128 primitive to remove the cpu_abort on 32-bit hosts.
Reviewed-by: Philipp
target/s390x: Use a single return for helper_divs64/u64
Pack the quotient and remainder into a single Int128. Use the divu128 primitive to remove the cpu_abort on 32-bit hosts.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Extended div test case to cover these insns.
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#
6d28ff40 |
| 19-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
target/s390x: Use a single return for helper_divs32/u32
Pack the quotient and remainder into a single uint64_t.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbran
target/s390x: Use a single return for helper_divs32/u32
Pack the quotient and remainder into a single uint64_t.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Fix operand ordering; use tcg_extr32_i64.
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#
4208e6ae |
| 15-Dec-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-request-2022-12-15' of https://gitlab.com/thuth/qemu into staging
* s390x PCI fixes and improvements (for the ISM device) * Fix emulated MVCP and MVCS s390x instructions * Clean-ups
Merge tag 'pull-request-2022-12-15' of https://gitlab.com/thuth/qemu into staging
* s390x PCI fixes and improvements (for the ISM device) * Fix emulated MVCP and MVCS s390x instructions * Clean-ups for the e1000e qtest * Enable qtests on Windows * Update FreeBSD CI to version 12.4 * Check --disable-tcg for ppc64 in the CI * Improve scripts/make-releases a little bit * Many other misc small clean-ups and fixes here and there
# gpg: Signature made Thu 15 Dec 2022 15:05:44 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2022-12-15' of https://gitlab.com/thuth/qemu: (23 commits) tests/qtest/vhost-user-blk-test: don't abort all qtests on missing envar .gitlab/issue_templates: Move suggestions into comments gitlab-ci: Check building ppc64 without TCG FreeBSD: Upgrade to 12.4 release tests/qtest: Enable qtest build on Windows .gitlab-ci.d/windows.yml: Exclude qTests from 64-bit CI job for now .gitlab-ci.d/windows.yml: Keep 64-bit and 32-bit build scripts consistent .gitlab-ci.d/windows.yml: Unify the prerequisite packages tests/qtest/libqos/e1000e: Correctly group register accesses tests/qtest/e1000e-test: De-duplicate constants tests/qtest/libqos/e1000e: Remove "other" interrupts hw: Include the VMWare devices only in the x86 targets MAINTAINERS: Add documentation files to the corresponding sections util/oslib-win32: Remove obsolete reference to g_poll code util/qemu-config: Fix "query-command-line-options" to provide the right values scripts/make-release: Only clone single branches to speed up the script scripts/make-release: Add a simple help text for the script monitor/misc: Remove superfluous include statements target/s390x: The MVCP and MVCS instructions are not privileged target/s390x/tcg/mem_helper: Test the right bits in psw_key_valid() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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