#
2d2c73d0 |
| 14-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging
* hw/misc/a9scu: Do not allow invalid CPU count * hw/misc/a9scu: Minor cleanups * hw/timer/armv7m_syst
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging
* hw/misc/a9scu: Do not allow invalid CPU count * hw/misc/a9scu: Minor cleanups * hw/timer/armv7m_systick: assert that board code set system_clock_scale * decodetree: Improve identifier matching * target/arm: Clean up neon fp insn size field decode * target/arm: Remove KVM support for 32-bit Arm hosts * hw/arm/mps2: New board models mps2-an386, mps2-an500 * Deprecate Unicore32 port * Deprecate lm32 port * target/arm: Count PMU events when MDCR.SPME is set * hw/arm: versal-virt: Correct the tx/rx GEM clocks * New Nuvoton iBMC board models npcm750-evb, quanta-gsj
# gpg: Signature made Mon 14 Sep 2020 16:02:06 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200914-1: (32 commits) tests/acceptance: console boot tests for quanta-gsj docs/system: Add Nuvoton machine documentation hw/arm/npcm7xx: add board setup stub for CPU and UART clocks hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj hw/ssi: NPCM7xx Flash Interface Unit device model hw/mem: Stubbed out NPCM7xx Memory Controller model hw/nvram: NPCM7xx OTP device model hw/arm: Load -bios image as a boot ROM for npcm7xx roms: Add virtual Boot ROM for NPCM7xx SoCs hw/arm: Add two NPCM7xx-based machines hw/arm: Add NPCM730 and NPCM750 SoC models hw/timer: Add NPCM7xx Timer device model hw/misc: Add NPCM7xx Clock Controller device model hw/misc: Add NPCM7xx System Global Control Registers device model hw/arm: versal-virt: Correct the tx/rx GEM clocks target/arm: Count PMU events when MDCR.SPME is set Deprecate lm32 port Deprecate Unicore32 port docs/system/arm/mps2.rst: Make board list consistent hw/arm/mps2: New board model mps2-an500 ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
d1cb5eda |
| 11-Sep-2020 |
Havard Skinnemoen <hskinnemoen@google.com> |
roms: Add virtual Boot ROM for NPCM7xx SoCs
This is a minimalistic boot ROM written specifically for use with QEMU. It supports loading the second-stage loader from SPI flash into RAM, SMP boot, and
roms: Add virtual Boot ROM for NPCM7xx SoCs
This is a minimalistic boot ROM written specifically for use with QEMU. It supports loading the second-stage loader from SPI flash into RAM, SMP boot, and not much else.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-7-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|