4ae7d11b | 27-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu into staging
target/ppc: Fix lxvx/stxvx facility check linux-user: update syscall_nr.h to Linux v6.10 linux-user: update syscall.tbl
Merge tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu into staging
target/ppc: Fix lxvx/stxvx facility check linux-user: update syscall_nr.h to Linux v6.10 linux-user: update syscall.tbl to Linux v6.11 tcg: Fix iteration step in 32-bit gvec operation tcg: Propagate new TCGOp to add_as_label_use tcg/*: Do not expand cmp_vec, cmpsel_vec early tcg/optimize: Fold movcond with true and false values identical tcg/optimize: Optimize cmp_vec and cmpsel_vec tcg/optimize: Optimize bitsel_vec tcg/i386: Optimize cmpsel with constant 0 operand 3. tcg/i386: Implement cmp_vec with avx512 insns tcg/i386: Implement cmpsel_vec with avx512 insns tcg/i386: Implement vector TST{EQ,NE} for avx512 tcg/ppc: Implement cmpsel_vec and optimize with constant 0/-1 arguments tcg/s390x: Implement cmpsel_vec and optimize with constant 0/-1 arguments
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* tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu: (31 commits) linux-user: update syscall.tbl to Linux v6.11 linux-user,loongarch: move to syscalltbl file linux-user,hexagon: move to syscalltbl file linux-user,riscv: move to syscalltbl file linux-user,openrisc: move to syscalltbl file linux-user,aarch64: move to syscalltbl file linux-user: update syscall.tbl to Linux v6.10 linux-user, mips: update syscall-args-o32.c.inc to Linux v6.10 linux-user: update syscall_nr.h to Linux v6.10 target/ppc: Fix lxvx/stxvx facility check tcg/s390x: Optimize cmpsel with constant 0/-1 arguments tcg/s390x: Implement cmpsel_vec tcg/ppc: Optimize cmpsel with constant 0/-1 arguments tcg/ppc: Implement cmpsel_vec tcg/i386: Implement vector TST{EQ,NE} for avx512 tcg/i386: Implement cmpsel_vec with avx512 insns tcg/i386: Add predicate parameters to tcg_out_evex_opc tcg/i386: Implement cmp_vec with avx512 insns tcg/i386: Optimize cmpsel with constant 0 operand 3. tcg/optimize: Optimize bitsel_vec ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2a1905c7 | 14-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
target/sparc: Split psr and xcc into components
Step in removing CC_OP: change the representation of CC_OP_FLAGS. The 8 bits are distributed between 6 variables, which should make it easy to keep up
target/sparc: Split psr and xcc into components
Step in removing CC_OP: change the representation of CC_OP_FLAGS. The 8 bits are distributed between 6 variables, which should make it easy to keep up to date.
The code within cc_helper.c is quite ugly but is only temporary.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e64c6d42 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle tag overflow traps
This trap is raised by taddcctv and tsubcctv insns.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-1
linux-user/sparc: Handle tag overflow traps
This trap is raised by taddcctv and tsubcctv insns.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-16-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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4ea3af39 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle floating-point exceptions
Raise SIGFPE for ieee exceptions.
The other types, such as FSR_FTT_UNIMPFPOP, should not appear, because we enable normal emulation of missing ins
linux-user/sparc: Handle floating-point exceptions
Raise SIGFPE for ieee exceptions.
The other types, such as FSR_FTT_UNIMPFPOP, should not appear, because we enable normal emulation of missing insns at the start of sparc_cpu_realizefn().
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-15-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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81f04cd3 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle unimplemented flush trap
For sparc64, TT_UNIMP_FLUSH == TT_ILL_INSN, so this is already handled. For sparc32, the kernel uses SKIP_TRAP.
Signed-off-by: Richard Henderson <
linux-user/sparc: Handle unimplemented flush trap
For sparc64, TT_UNIMP_FLUSH == TT_ILL_INSN, so this is already handled. For sparc32, the kernel uses SKIP_TRAP.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-14-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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c47d7c87 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle coprocessor disabled trap
Since qemu does not implement a sparc coprocessor, all such instructions raise this trap. Because of that, we never raise the coprocessor exceptio
linux-user/sparc: Handle coprocessor disabled trap
Since qemu does not implement a sparc coprocessor, all such instructions raise this trap. Because of that, we never raise the coprocessor exception trap, which would be vector 0x28.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-13-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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235f33b8 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle privilidged action trap
This is raised by using an %asi < 0x80 in user-mode.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.126
linux-user/sparc: Handle privilidged action trap
This is raised by using an %asi < 0x80 in user-mode.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-12-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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97ff1478 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle priviledged opcode trap
For the most part priviledged opcodes are ifdefed out of the user-only sparc translator, which will then incorrectly produce illegal opcode traps. B
linux-user/sparc: Handle priviledged opcode trap
For the most part priviledged opcodes are ifdefed out of the user-only sparc translator, which will then incorrectly produce illegal opcode traps. But there are some code paths that properly raise TT_PRIV_INSN, so we must handle it.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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6abc58eb | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle getcc, setcc, getpsr traps
These are really only meaningful for sparc32, but they're still present for backward compatibility for sparc64.
Signed-off-by: Richard Henderson
linux-user/sparc: Handle getcc, setcc, getpsr traps
These are really only meaningful for sparc32, but they're still present for backward compatibility for sparc64.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-10-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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0908007f | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle division by zero traps
In addition to the hw trap vector, there is a software trap assigned for older sparc without hw division instructions.
Signed-off-by: Richard Henders
linux-user/sparc: Handle division by zero traps
In addition to the hw trap vector, there is a software trap assigned for older sparc without hw division instructions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-9-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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52d104a5 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Handle software breakpoint trap
This is 'ta 1' for both v9 and pre-v9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-8-richar
linux-user/sparc: Handle software breakpoint trap
This is 'ta 1' for both v9 and pre-v9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-8-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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d6b03637 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Fix sparc64_{get, set}_context traps
These traps are present for sparc64 with ilp32, aka sparc32plus. Enabling them means adjusting the defines over in signal.c, and fixing an inco
linux-user/sparc: Fix sparc64_{get, set}_context traps
These traps are present for sparc64 with ilp32, aka sparc32plus. Enabling them means adjusting the defines over in signal.c, and fixing an incorrect usage of abi_ulong when we really meant the full register, target_ulong.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-7-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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6f772241 | 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
linux-user/sparc: Tidy window spill/fill traps
Add some macros to localize the hw difference between v9 and pre-v9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Phil
linux-user/sparc: Tidy window spill/fill traps
Add some macros to localize the hw difference between v9 and pre-v9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230216054516.1267305-6-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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